123 #define	ALL_WRITE	0xFFFFFFFFU  macro
637 	p_setw(perm, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE, (u16)ALL_WRITE);  in init_pci_cap_basic_perm()
643 	p_setb(perm, PCI_CACHE_LINE_SIZE, NO_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
644 	p_setb(perm, PCI_LATENCY_TIMER, NO_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
645 	p_setb(perm, PCI_BIST, NO_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
648 	p_setd(perm, PCI_BASE_ADDRESS_0, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
649 	p_setd(perm, PCI_BASE_ADDRESS_1, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
650 	p_setd(perm, PCI_BASE_ADDRESS_2, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
651 	p_setd(perm, PCI_BASE_ADDRESS_3, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
652 	p_setd(perm, PCI_BASE_ADDRESS_4, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
653 	p_setd(perm, PCI_BASE_ADDRESS_5, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
654 	p_setd(perm, PCI_ROM_ADDRESS, ALL_VIRT, ALL_WRITE);  in init_pci_cap_basic_perm()
660 	p_setb(perm, PCI_INTERRUPT_LINE, (u8)ALL_VIRT, (u8)ALL_WRITE);  in init_pci_cap_basic_perm()
785 	p_setw(perm, PCI_VPD_ADDR, (u16)ALL_VIRT, (u16)ALL_WRITE);  in init_pci_cap_vpd_perm()
786 	p_setd(perm, PCI_VPD_DATA, ALL_VIRT, ALL_WRITE);  in init_pci_cap_vpd_perm()
800 	p_setw(perm, PCI_X_CMD, NO_VIRT, (u16)ALL_WRITE);  in init_pci_cap_pcix_perm()
801 	p_setd(perm, PCI_X_ECC_CSR, NO_VIRT, ALL_WRITE);  in init_pci_cap_pcix_perm()
995 	p_setb(perm, PCI_PWR_DATA, NO_VIRT, (u8)ALL_WRITE);  in init_pci_ext_cap_pwr_perm()
1139 	p_setb(perm, PCI_MSI_FLAGS, (u8)ALL_VIRT, (u8)ALL_WRITE);  in init_pci_cap_msi_perm()
1140 	p_setd(perm, PCI_MSI_ADDRESS_LO, ALL_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1142 		p_setd(perm, PCI_MSI_ADDRESS_HI, ALL_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1143 		p_setw(perm, PCI_MSI_DATA_64, (u16)ALL_VIRT, (u16)ALL_WRITE);  in init_pci_cap_msi_perm()
1145 			p_setd(perm, PCI_MSI_MASK_64, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1146 			p_setd(perm, PCI_MSI_PENDING_64, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1149 		p_setw(perm, PCI_MSI_DATA_32, (u16)ALL_VIRT, (u16)ALL_WRITE);  in init_pci_cap_msi_perm()
1151 			p_setd(perm, PCI_MSI_MASK_32, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()
1152 			p_setd(perm, PCI_MSI_PENDING_32, NO_VIRT, ALL_WRITE);  in init_pci_cap_msi_perm()