Lines Matching refs:hw_ep
203 struct musb_hw_ep *hw_ep = qh->hw_ep; in musb_start_urb() local
204 int epnum = hw_ep->epnum; in musb_start_urb()
234 musb_ep_set_qh(hw_ep, is_in, qh); in musb_start_urb()
267 hw_ep->tx_channel ? "dma" : "pio"); in musb_start_urb()
269 if (!hw_ep->tx_channel) in musb_start_urb()
270 musb_h_tx_start(hw_ep); in musb_start_urb()
272 musb_h_tx_dma_start(hw_ep); in musb_start_urb()
293 void __iomem *epio = qh->hw_ep->regs; in musb_save_toggle()
317 struct musb_hw_ep *hw_ep, int is_in) in musb_advance_schedule() argument
319 struct musb_qh *qh = musb_ep_get_qh(hw_ep, is_in); in musb_advance_schedule()
320 struct musb_hw_ep *ep = qh->hw_ep; in musb_advance_schedule()
397 hw_ep->epnum, is_in ? 'R' : 'T', next_urb(qh)); in musb_advance_schedule()
402 static u16 musb_h_flush_rxfifo(struct musb_hw_ep *hw_ep, u16 csr) in musb_h_flush_rxfifo() argument
414 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
415 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_h_flush_rxfifo()
418 return musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_h_flush_rxfifo()
433 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_packet_rx() local
434 void __iomem *epio = hw_ep->regs; in musb_host_packet_rx()
435 struct musb_qh *qh = hw_ep->in_qh; in musb_host_packet_rx()
500 musb_read_fifo(hw_ep, length, buf); in musb_host_packet_rx()
505 musb_h_flush_rxfifo(hw_ep, csr); in musb_host_packet_rx()
585 struct musb_hw_ep *hw_ep, struct musb_qh *qh, in musb_tx_dma_set_mode_mentor() argument
589 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_set_mode_mentor()
590 void __iomem *epio = hw_ep->regs; in musb_tx_dma_set_mode_mentor()
612 can_bulk_split(hw_ep->musb, qh->type))) in musb_tx_dma_set_mode_mentor()
624 struct musb_hw_ep *hw_ep, in musb_tx_dma_set_mode_cppi_tusb() argument
631 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_set_mode_cppi_tusb()
643 struct musb_hw_ep *hw_ep, struct musb_qh *qh, in musb_tx_dma_program() argument
646 struct dma_channel *channel = hw_ep->tx_channel; in musb_tx_dma_program()
650 if (musb_dma_inventra(hw_ep->musb) || musb_dma_ux500(hw_ep->musb)) in musb_tx_dma_program()
651 musb_tx_dma_set_mode_mentor(dma, hw_ep, qh, urb, offset, in musb_tx_dma_program()
653 else if (is_cppi_enabled(hw_ep->musb) || tusb_dma_omap(hw_ep->musb)) in musb_tx_dma_program()
654 musb_tx_dma_set_mode_cppi_tusb(dma, hw_ep, qh, urb, offset, in musb_tx_dma_program()
669 void __iomem *epio = hw_ep->regs; in musb_tx_dma_program()
673 hw_ep->tx_channel = NULL; in musb_tx_dma_program()
695 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_ep_program() local
696 void __iomem *epio = hw_ep->regs; in musb_ep_program()
697 struct musb_qh *qh = musb_ep_get_qh(hw_ep, !is_out); in musb_ep_program()
717 hw_ep->tx_channel = NULL; in musb_ep_program()
723 dma_channel = is_out ? hw_ep->tx_channel : hw_ep->rx_channel; in musb_ep_program()
726 dma_controller, hw_ep, is_out); in musb_ep_program()
728 hw_ep->tx_channel = dma_channel; in musb_ep_program()
730 hw_ep->rx_channel = dma_channel; in musb_ep_program()
757 if (!hw_ep->tx_double_buffered) in musb_ep_program()
758 musb_h_tx_flush_fifo(hw_ep); in musb_ep_program()
775 if (!hw_ep->tx_double_buffered) { in musb_ep_program()
790 musb_h_ep0_flush_fifo(hw_ep); in musb_ep_program()
806 qh->hb_mult = hw_ep->max_packet_sz_tx in musb_ep_program()
824 load_count = min((u32) hw_ep->max_packet_sz_tx, in musb_ep_program()
830 hw_ep, qh, urb, offset, len)) in musb_ep_program()
851 musb_write_fifo(hw_ep, load_count, buf); in musb_ep_program()
855 musb_write_fifo(hw_ep, load_count, buf); in musb_ep_program()
865 if (hw_ep->rx_reinit) { in musb_ep_program()
878 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
884 hw_ep->epnum, csr); in musb_ep_program()
898 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
899 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
912 hw_ep->rx_channel = dma_channel = NULL; in musb_ep_program()
919 musb_writew(hw_ep->regs, MUSB_RXCSR, csr); in musb_ep_program()
920 csr = musb_readw(hw_ep->regs, MUSB_RXCSR); in musb_ep_program()
1009 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_continue() local
1010 struct musb_qh *qh = hw_ep->in_qh; in musb_h_ep0_continue()
1021 musb_read_fifo(hw_ep, fifo_count, fifo_dest); in musb_h_ep0_continue()
1060 musb_write_fifo(hw_ep, fifo_count, fifo_dest); in musb_h_ep0_continue()
1086 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_irq() local
1087 void __iomem *epio = hw_ep->regs; in musb_h_ep0_irq()
1088 struct musb_qh *qh = hw_ep->in_qh; in musb_h_ep0_irq()
1148 musb_h_ep0_flush_fifo(hw_ep); in musb_h_ep0_irq()
1162 musb_h_ep0_flush_fifo(hw_ep); in musb_h_ep0_irq()
1198 musb_advance_schedule(musb, urb, hw_ep, 1); in musb_h_ep0_irq()
1228 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_tx() local
1229 void __iomem *epio = hw_ep->regs; in musb_host_tx()
1230 struct musb_qh *qh = hw_ep->out_qh; in musb_host_tx()
1247 dma = is_dma_capable() ? hw_ep->tx_channel : NULL; in musb_host_tx()
1270 musb_bulk_nak_timeout(musb, hw_ep, 0); in musb_host_tx()
1299 musb_h_tx_flush_fifo(hw_ep); in musb_host_tx()
1435 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_OUT); in musb_host_tx()
1438 if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb, in musb_host_tx()
1441 musb_h_tx_dma_start(hw_ep); in musb_host_tx()
1478 musb_write_fifo(hw_ep, length, urb->transfer_buffer); in musb_host_tx()
1482 musb_write_fifo(hw_ep, length, urb->transfer_buffer + offset); in musb_host_tx()
1500 struct musb_hw_ep *hw_ep, in musb_rx_dma_iso_cppi41() argument
1505 struct dma_channel *channel = hw_ep->rx_channel; in musb_rx_dma_iso_cppi41()
1506 void __iomem *epio = hw_ep->regs; in musb_rx_dma_iso_cppi41()
1518 musb_writew(hw_ep->regs, MUSB_RXCSR, val); in musb_rx_dma_iso_cppi41()
1525 struct musb_hw_ep *hw_ep, in musb_rx_dma_iso_cppi41() argument
1571 struct musb_hw_ep *hw_ep, in musb_rx_dma_inventra_cppi41() argument
1576 struct dma_channel *channel = hw_ep->rx_channel; in musb_rx_dma_inventra_cppi41()
1577 void __iomem *epio = hw_ep->regs; in musb_rx_dma_inventra_cppi41()
1600 if (musb_dma_cppi41(hw_ep->musb)) in musb_rx_dma_inventra_cppi41()
1601 done = musb_rx_dma_iso_cppi41(dma, hw_ep, qh, in musb_rx_dma_inventra_cppi41()
1641 struct musb_hw_ep *hw_ep, in musb_rx_dma_in_inventra_cppi41() argument
1647 struct musb *musb = hw_ep->musb; in musb_rx_dma_in_inventra_cppi41()
1648 void __iomem *epio = hw_ep->regs; in musb_rx_dma_in_inventra_cppi41()
1649 struct dma_channel *channel = hw_ep->rx_channel; in musb_rx_dma_in_inventra_cppi41()
1694 if (rx_count < hw_ep->max_packet_sz_rx) { in musb_rx_dma_in_inventra_cppi41()
1728 hw_ep->rx_channel = NULL; in musb_rx_dma_in_inventra_cppi41()
1741 struct musb_hw_ep *hw_ep, in musb_rx_dma_inventra_cppi41() argument
1750 struct musb_hw_ep *hw_ep, in musb_rx_dma_in_inventra_cppi41() argument
1767 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_rx() local
1769 void __iomem *epio = hw_ep->regs; in musb_host_rx()
1770 struct musb_qh *qh = hw_ep->in_qh; in musb_host_rx()
1783 dma = is_dma_capable() ? hw_ep->rx_channel : NULL; in musb_host_rx()
1797 musb_h_flush_rxfifo(hw_ep, MUSB_RXCSR_CLRDATATOG); in musb_host_rx()
1836 musb_bulk_nak_timeout(musb, hw_ep, 1); in musb_host_rx()
1864 musb_h_flush_rxfifo(hw_ep, MUSB_RXCSR_CLRDATATOG); in musb_host_rx()
1912 musb_writew(hw_ep->regs, MUSB_RXCSR, val); in musb_host_rx()
1916 done = musb_rx_dma_inventra_cppi41(c, hw_ep, qh, urb, xfer_len); in musb_host_rx()
1917 musb_dbg(hw_ep->musb, in musb_host_rx()
1945 musb_dbg(hw_ep->musb, in musb_host_rx()
1953 if (musb_rx_dma_in_inventra_cppi41(c, hw_ep, qh, urb, in musb_host_rx()
2011 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_IN); in musb_host_rx()
2028 struct musb_hw_ep *hw_ep = NULL; in musb_schedule() local
2037 hw_ep = musb->control_ep; in musb_schedule()
2053 for (epnum = 1, hw_ep = musb->endpoints + 1; in musb_schedule()
2055 epnum++, hw_ep++) { in musb_schedule()
2058 if (musb_ep_get_qh(hw_ep, is_in) != NULL) in musb_schedule()
2061 if (hw_ep == musb->bulk_ep) in musb_schedule()
2065 diff = hw_ep->max_packet_sz_rx; in musb_schedule()
2067 diff = hw_ep->max_packet_sz_tx; in musb_schedule()
2084 hw_ep = musb->endpoints + epnum; in musb_schedule()
2086 txtype = (musb_readb(hw_ep->regs, MUSB_TXTYPE) in musb_schedule()
2098 hw_ep = musb->bulk_ep; in musb_schedule()
2125 hw_ep = musb->endpoints + best_end; in musb_schedule()
2133 qh->hw_ep = hw_ep; in musb_schedule()
2337 struct musb_hw_ep *ep = qh->hw_ep; in musb_cleanup_urb()
2423 || musb_ep_get_qh(qh->hw_ep, is_in) != qh) { in musb_urb_dequeue()
2465 if (musb_ep_get_qh(qh->hw_ep, is_in) == qh) { in musb_h_disable()
2481 musb_advance_schedule(musb, urb, qh->hw_ep, is_in); in musb_h_disable()