Lines Matching refs:musb

21 #define	next_ep0_request(musb)	next_in_request(&(musb)->endpoints[0])  argument
51 struct musb *musb, in service_tx_status_request() argument
54 void __iomem *mbase = musb->mregs; in service_tx_status_request()
63 result[0] = musb->g.is_selfpowered << USB_DEVICE_SELF_POWERED; in service_tx_status_request()
64 result[0] |= musb->may_wakeup << USB_DEVICE_REMOTE_WAKEUP; in service_tx_status_request()
65 if (musb->g.is_otg) { in service_tx_status_request()
66 result[0] |= musb->g.b_hnp_enable in service_tx_status_request()
68 result[0] |= musb->g.a_alt_hnp_support in service_tx_status_request()
70 result[0] |= musb->g.a_hnp_support in service_tx_status_request()
99 ep = &musb->endpoints[epnum].ep_in; in service_tx_status_request()
101 ep = &musb->endpoints[epnum].ep_out; in service_tx_status_request()
102 regs = musb->endpoints[epnum].regs; in service_tx_status_request()
133 musb_write_fifo(&musb->endpoints[0], len, result); in service_tx_status_request()
151 service_in_request(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest) in service_in_request() argument
159 handled = service_tx_status_request(musb, in service_in_request()
175 static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req) in musb_g_ep0_giveback() argument
177 musb_g_giveback(&musb->endpoints[0].ep_in, req, 0); in musb_g_ep0_giveback()
183 static inline void musb_try_b_hnp_enable(struct musb *musb) in musb_try_b_hnp_enable() argument
185 void __iomem *mbase = musb->mregs; in musb_try_b_hnp_enable()
188 musb_dbg(musb, "HNP: Setting HR"); in musb_try_b_hnp_enable()
204 service_zero_data_request(struct musb *musb, in service_zero_data_request() argument
206 __releases(musb->lock) in service_zero_data_request()
207 __acquires(musb->lock) in service_zero_data_request()
210 void __iomem *mbase = musb->mregs; in service_zero_data_request()
219 musb->set_address = true; in service_zero_data_request()
220 musb->address = (u8) (ctrlrequest->wValue & 0x7f); in service_zero_data_request()
230 musb->may_wakeup = 0; in service_zero_data_request()
249 ep = musb->endpoints + epnum; in service_zero_data_request()
285 musb_dbg(musb, "restarting the request"); in service_zero_data_request()
286 musb_ep_restart(musb, request); in service_zero_data_request()
305 musb->may_wakeup = 1; in service_zero_data_request()
308 if (musb->g.speed != USB_SPEED_HIGH) in service_zero_data_request()
317 musb->test_mode_nr = in service_zero_data_request()
323 musb->test_mode_nr = in service_zero_data_request()
329 musb->test_mode_nr = in service_zero_data_request()
335 musb->test_mode_nr = in service_zero_data_request()
342 musb->test_mode_nr = in service_zero_data_request()
348 musb->test_mode_nr = in service_zero_data_request()
354 musb->test_mode_nr = in service_zero_data_request()
360 musb->test_mode_nr = in service_zero_data_request()
369 musb->test_mode = true; in service_zero_data_request()
372 if (!musb->g.is_otg) in service_zero_data_request()
374 musb->g.b_hnp_enable = 1; in service_zero_data_request()
375 musb_try_b_hnp_enable(musb); in service_zero_data_request()
378 if (!musb->g.is_otg) in service_zero_data_request()
380 musb->g.a_hnp_support = 1; in service_zero_data_request()
383 if (!musb->g.is_otg) in service_zero_data_request()
385 musb->g.a_alt_hnp_support = 1; in service_zero_data_request()
413 ep = musb->endpoints + epnum; in service_zero_data_request()
464 static void ep0_rxstate(struct musb *musb) in ep0_rxstate() argument
466 void __iomem *regs = musb->control_ep->regs; in ep0_rxstate()
471 request = next_ep0_request(musb); in ep0_rxstate()
488 musb_read_fifo(&musb->endpoints[0], count, buf); in ep0_rxstate()
493 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in ep0_rxstate()
505 musb->ackpend = csr; in ep0_rxstate()
506 musb_g_ep0_giveback(musb, req); in ep0_rxstate()
507 if (!musb->ackpend) in ep0_rxstate()
509 musb->ackpend = 0; in ep0_rxstate()
511 musb_ep_select(musb->mregs, 0); in ep0_rxstate()
521 static void ep0_txstate(struct musb *musb) in ep0_txstate() argument
523 void __iomem *regs = musb->control_ep->regs; in ep0_txstate()
524 struct musb_request *req = next_ep0_request(musb); in ep0_txstate()
532 musb_dbg(musb, "odd; csr0 %04x", musb_readw(regs, MUSB_CSR0)); in ep0_txstate()
542 musb_write_fifo(&musb->endpoints[0], fifo_count, fifo_src); in ep0_txstate()
549 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT; in ep0_txstate()
560 musb->ackpend = csr; in ep0_txstate()
561 musb_g_ep0_giveback(musb, request); in ep0_txstate()
562 if (!musb->ackpend) in ep0_txstate()
564 musb->ackpend = 0; in ep0_txstate()
568 musb_ep_select(musb->mregs, 0); in ep0_txstate()
579 musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req) in musb_read_setup() argument
582 void __iomem *regs = musb->control_ep->regs; in musb_read_setup()
584 musb_read_fifo(&musb->endpoints[0], sizeof *req, (u8 *)req); in musb_read_setup()
589 musb_dbg(musb, "SETUP req%02x.%02x v%04x i%04x l%d", in musb_read_setup()
597 r = next_ep0_request(musb); in musb_read_setup()
599 musb_g_ep0_giveback(musb, &r->request); in musb_read_setup()
609 musb->set_address = false; in musb_read_setup()
610 musb->ackpend = MUSB_CSR0_P_SVDRXPKTRDY; in musb_read_setup()
613 musb->ackpend |= MUSB_CSR0_TXPKTRDY; in musb_read_setup()
614 musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT; in musb_read_setup()
616 musb->ep0_state = MUSB_EP0_STAGE_TX; in musb_read_setup()
621 musb->ackpend = 0; in musb_read_setup()
623 musb->ep0_state = MUSB_EP0_STAGE_RX; in musb_read_setup()
627 forward_to_driver(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest) in forward_to_driver() argument
628 __releases(musb->lock) in forward_to_driver()
629 __acquires(musb->lock) in forward_to_driver()
632 if (!musb->gadget_driver) in forward_to_driver()
634 spin_unlock(&musb->lock); in forward_to_driver()
635 retval = musb->gadget_driver->setup(&musb->g, ctrlrequest); in forward_to_driver()
636 spin_lock(&musb->lock); in forward_to_driver()
645 irqreturn_t musb_g_ep0_irq(struct musb *musb) in musb_g_ep0_irq() argument
649 void __iomem *mbase = musb->mregs; in musb_g_ep0_irq()
650 void __iomem *regs = musb->endpoints[0].regs; in musb_g_ep0_irq()
657 musb_dbg(musb, "csr %04x, count %d, ep0stage %s", in musb_g_ep0_irq()
658 csr, len, decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
673 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
682 switch (musb->ep0_state) { in musb_g_ep0_irq()
684 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT; in musb_g_ep0_irq()
687 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in musb_g_ep0_irq()
691 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
701 switch (musb->ep0_state) { in musb_g_ep0_irq()
706 ep0_txstate(musb); in musb_g_ep0_irq()
714 ep0_rxstate(musb); in musb_g_ep0_irq()
727 if (musb->set_address) { in musb_g_ep0_irq()
728 musb->set_address = false; in musb_g_ep0_irq()
729 musb_writeb(mbase, MUSB_FADDR, musb->address); in musb_g_ep0_irq()
733 else if (musb->test_mode) { in musb_g_ep0_irq()
734 musb_dbg(musb, "entering TESTMODE"); in musb_g_ep0_irq()
736 if (MUSB_TEST_PACKET == musb->test_mode_nr) in musb_g_ep0_irq()
737 musb_load_testpacket(musb); in musb_g_ep0_irq()
740 musb->test_mode_nr); in musb_g_ep0_irq()
749 req = next_ep0_request(musb); in musb_g_ep0_irq()
751 musb_g_ep0_giveback(musb, &req->request); in musb_g_ep0_irq()
762 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
773 musb->ep0_state = MUSB_EP0_STAGE_SETUP; in musb_g_ep0_irq()
786 musb_read_setup(musb, &setup); in musb_g_ep0_irq()
790 if (unlikely(musb->g.speed == USB_SPEED_UNKNOWN)) { in musb_g_ep0_irq()
797 musb->g.speed = (power & MUSB_POWER_HSMODE) in musb_g_ep0_irq()
802 switch (musb->ep0_state) { in musb_g_ep0_irq()
811 musb, &setup); in musb_g_ep0_irq()
819 musb->ackpend |= MUSB_CSR0_P_DATAEND; in musb_g_ep0_irq()
823 musb->ep0_state = in musb_g_ep0_irq()
832 handled = service_in_request(musb, &setup); in musb_g_ep0_irq()
834 musb->ackpend = MUSB_CSR0_TXPKTRDY in musb_g_ep0_irq()
836 musb->ep0_state = in musb_g_ep0_irq()
846 musb_dbg(musb, "handled %d, csr %04x, ep0stage %s", in musb_g_ep0_irq()
848 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
859 handled = forward_to_driver(musb, &setup); in musb_g_ep0_irq()
863 musb_dbg(musb, "stall (%d)", handled); in musb_g_ep0_irq()
864 musb->ackpend |= MUSB_CSR0_P_SENDSTALL; in musb_g_ep0_irq()
865 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
868 musb->ackpend); in musb_g_ep0_irq()
869 musb->ackpend = 0; in musb_g_ep0_irq()
885 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
911 struct musb *musb; in musb_g_ep0_queue() local
920 musb = ep->musb; in musb_g_ep0_queue()
921 regs = musb->control_ep->regs; in musb_g_ep0_queue()
924 req->musb = musb; in musb_g_ep0_queue()
929 spin_lock_irqsave(&musb->lock, lockflags); in musb_g_ep0_queue()
936 switch (musb->ep0_state) { in musb_g_ep0_queue()
943 musb_dbg(musb, "ep0 request queued in state %d", in musb_g_ep0_queue()
944 musb->ep0_state); in musb_g_ep0_queue()
952 musb_dbg(musb, "queue to %s (%s), length=%d", in musb_g_ep0_queue()
956 musb_ep_select(musb->mregs, 0); in musb_g_ep0_queue()
959 if (musb->ep0_state == MUSB_EP0_STAGE_TX) in musb_g_ep0_queue()
960 ep0_txstate(musb); in musb_g_ep0_queue()
963 else if (musb->ep0_state == MUSB_EP0_STAGE_ACKWAIT) { in musb_g_ep0_queue()
967 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in musb_g_ep0_queue()
969 musb->ackpend | MUSB_CSR0_P_DATAEND); in musb_g_ep0_queue()
970 musb->ackpend = 0; in musb_g_ep0_queue()
971 musb_g_ep0_giveback(ep->musb, r); in musb_g_ep0_queue()
978 } else if (musb->ackpend) { in musb_g_ep0_queue()
979 musb_writew(regs, MUSB_CSR0, musb->ackpend); in musb_g_ep0_queue()
980 musb->ackpend = 0; in musb_g_ep0_queue()
984 spin_unlock_irqrestore(&musb->lock, lockflags); in musb_g_ep0_queue()
997 struct musb *musb; in musb_g_ep0_halt() local
1007 musb = ep->musb; in musb_g_ep0_halt()
1008 base = musb->mregs; in musb_g_ep0_halt()
1009 regs = musb->control_ep->regs; in musb_g_ep0_halt()
1012 spin_lock_irqsave(&musb->lock, flags); in musb_g_ep0_halt()
1020 csr = musb->ackpend; in musb_g_ep0_halt()
1022 switch (musb->ep0_state) { in musb_g_ep0_halt()
1041 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_halt()
1042 musb->ackpend = 0; in musb_g_ep0_halt()
1045 musb_dbg(musb, "ep0 can't halt in state %d", musb->ep0_state); in musb_g_ep0_halt()
1050 spin_unlock_irqrestore(&musb->lock, flags); in musb_g_ep0_halt()