Lines Matching refs:platdata
57 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) { in ehci_ci_portpower()
81 if (ci->platdata->notify_event) { in ehci_ci_reset()
82 ret = ci->platdata->notify_event(ci, in ehci_ci_reset()
125 hcd->power_budget = ci->platdata->power_budget; in host_start()
126 hcd->tpl_support = ci->platdata->tpl_support; in host_start()
142 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) { in host_start()
143 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) { in host_start()
144 ret = regulator_enable(ci->platdata->reg_vbus); in host_start()
152 priv->reg_vbus = ci->platdata->reg_vbus; in host_start()
173 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && in host_start()
174 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) in host_start()
175 regulator_disable(ci->platdata->reg_vbus); in host_start()
187 if (ci->platdata->notify_event) in host_stop()
188 ci->platdata->notify_event(ci, in host_stop()
194 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && in host_stop()
195 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) in host_stop()
196 regulator_disable(ci->platdata->reg_vbus); in host_stop()