Lines Matching refs:lpm
224 enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC; in ci_hdrc_enter_lpm()
225 bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm))); in ci_hdrc_enter_lpm() local
227 if (enable && !lpm) in ci_hdrc_enter_lpm()
228 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm), in ci_hdrc_enter_lpm()
229 PORTSC_PHCD(ci->hw_bank.lpm)); in ci_hdrc_enter_lpm()
230 else if (!enable && lpm) in ci_hdrc_enter_lpm()
231 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm), in ci_hdrc_enter_lpm()
249 ci->hw_bank.lpm = reg; in hw_device_init()
275 ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op); in hw_device_init()
288 u32 portsc, lpm, sts = 0; in hw_phymode_configure() local
293 lpm = DEVLC_PTS(PTS_UTMI); in hw_phymode_configure()
297 lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW; in hw_phymode_configure()
301 lpm = DEVLC_PTS(PTS_ULPI); in hw_phymode_configure()
305 lpm = DEVLC_PTS(PTS_SERIAL); in hw_phymode_configure()
310 lpm = DEVLC_PTS(PTS_HSIC); in hw_phymode_configure()
316 if (ci->hw_bank.lpm) { in hw_phymode_configure()
317 hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm); in hw_phymode_configure()
444 if (ci->hw_bank.lpm) in ci_platform_configure()
526 pr_err("lpm = %i", ci->hw_bank.lpm); in hw_device_reset()