218 	unsigned char ie1_value;  member
2086 	unsigned char status = read_reg(info, SR1) & info->ie1_value & (FLGD + IDLD + CDCD + BRKD);  in isr_rxint()
2221 	info->ie1_value &= ~(IDLE + UDRN);  in isr_txeom()
2222 	write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));  in isr_txeom()
2265 	unsigned char status = read_reg(info, SR1) & info->ie1_value & (UDRN + IDLE + CCTS);  in isr_txint()
2300 		info->ie1_value |= IDLE;  in isr_txrdy()
2301 		write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));  in isr_txrdy()
2420 				info->ie1_value &= ~CDCD;  in isr_io_pin()
2421 				write_reg(info, IE1, info->ie1_value);  in isr_io_pin()
2440 				info->ie1_value &= ~CCTS;  in isr_io_pin()
2441 				write_reg(info, IE1, info->ie1_value);  in isr_io_pin()
2720 	info->ie1_value |= (CDCD|CCTS);  in program_hw()
2721 	write_reg(info, IE1, info->ie1_value);  in program_hw()
2962 		info->ie1_value &= ~UDRN;  in tx_abort()
2963 		info->ie1_value |= IDLE;  in tx_abort()
2964 		write_reg(info, IE1, info->ie1_value);	/* disable tx status interrupts */  in tx_abort()
3040 		unsigned char oldval = info->ie1_value;  in wait_mgsl_event()
3045 			info->ie1_value = newval;  in wait_mgsl_event()
3046 			write_reg(info, IE1, info->ie1_value);  in wait_mgsl_event()
3110 			info->ie1_value &= ~(FLGD|IDLD);  in wait_mgsl_event()
3111 			write_reg(info, IE1, info->ie1_value);  in wait_mgsl_event()
4226 			info->ie1_value &= ~IDLE;  in tx_start()
4227 			info->ie1_value |= UDRN;  in tx_start()
4228 			write_reg(info, IE1, info->ie1_value);  in tx_start()
4263 	info->ie1_value &= ~(UDRN + IDLE);  in tx_stop()
4264 	write_reg(info, IE1, info->ie1_value);	/* disable tx status interrupts */  in tx_stop()
4338 		info->ie1_value = 0;  in reset_port()
4341 		write_reg(info, IE1, info->ie1_value);  in reset_port()
4489 	info->ie1_value = BRKD;  in async_mode()
4490 	write_reg(info, IE1, info->ie1_value);  in async_mode()