Lines Matching refs:TCR
394 #define TCR 0x82 /* tx control */ macro
1394 value = rd_reg16(info, TCR); in set_break()
1399 wr_reg16(info, TCR, value); in set_break()
2277 unsigned short val = rd_reg16(info, TCR); in isr_txeom()
2278 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */ in isr_txeom()
2279 wr_reg16(info, TCR, val); /* clear reset bit */ in isr_txeom()
2862 val = rd_reg16(info, TCR); in set_interface()
2867 wr_reg16(info, TCR, val); in set_interface()
4019 wr_reg16(info, TCR, in tx_start()
4020 (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2)); in tx_start()
4063 val = rd_reg16(info, TCR) & ~BIT1; /* clear enable bit */ in tx_stop()
4064 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */ in tx_stop()
4150 wr_reg16(info, TCR, val); in async_mode()
4312 wr_reg16(info, TCR, val); in sync_mode()
4474 tcr = rd_reg16(info, TCR); in tx_set_idle()
4484 wr_reg16(info, TCR, tcr); in tx_set_idle()
4973 wr_reg16(info, TCR, in irq_test()
4974 (unsigned short)(rd_reg16(info, TCR) | BIT1)); in irq_test()