Lines Matching refs:RECEIVE_STATUS

490 #define RECEIVE_STATUS		BIT5  macro
1196 usc_ClearIrqPendingBits( info, RECEIVE_STATUS ); in mgsl_isr_receive_status()
1546 usc_ClearIrqPendingBits(info, RECEIVE_DATA | RECEIVE_STATUS); in mgsl_isr_misc()
1547 usc_DisableInterrupts(info, RECEIVE_DATA | RECEIVE_STATUS); in mgsl_isr_misc()
1832 usc_DisableInterrupts(info,RECEIVE_DATA | RECEIVE_STATUS | in shutdown()
4776 usc_ClearIrqPendingBits( info, RECEIVE_STATUS ); in usc_set_sdlc_mode()
5016 usc_ClearIrqPendingBits( info, RECEIVE_STATUS | RECEIVE_DATA | in usc_set_sdlc_mode()
5393 usc_ClearIrqPendingBits(info, RECEIVE_DATA|RECEIVE_STATUS); in usc_process_rxoverrun_sync()
5394 usc_UnlatchRxstatusBits(info, RECEIVE_DATA|RECEIVE_STATUS); in usc_process_rxoverrun_sync()
5407 usc_ClearIrqPendingBits( info, RECEIVE_DATA | RECEIVE_STATUS ); in usc_process_rxoverrun_sync()
5408 usc_EnableInterrupts( info, RECEIVE_STATUS ); in usc_process_rxoverrun_sync()
5448 usc_ClearIrqPendingBits( info, RECEIVE_DATA | RECEIVE_STATUS ); in usc_stop_receiver()
5449 usc_DisableInterrupts( info, RECEIVE_DATA | RECEIVE_STATUS ); in usc_stop_receiver()
5496 usc_ClearIrqPendingBits( info, RECEIVE_DATA | RECEIVE_STATUS ); in usc_start_receiver()
5497 usc_EnableInterrupts( info, RECEIVE_STATUS ); in usc_start_receiver()
5511 usc_ClearIrqPendingBits(info, RECEIVE_DATA | RECEIVE_STATUS); in usc_start_receiver()
5924 usc_ClearIrqPendingBits( info, RECEIVE_STATUS ); in usc_set_async_mode()
6004 RECEIVE_DATA + RECEIVE_STATUS ); in usc_set_async_mode()
6007 RECEIVE_DATA + RECEIVE_STATUS ); in usc_set_async_mode()