51 	writeb(0, &ch->ch_neo_uart->efr);  in neo_set_cts_flow_control()
54 	writeb(efr, &ch->ch_neo_uart->efr);  in neo_set_cts_flow_control()
57 	writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), &ch->ch_neo_uart->fctr);  in neo_set_cts_flow_control()
60 	writeb(8, &ch->ch_neo_uart->tfifo);  in neo_set_cts_flow_control()
63 	writeb(ier, &ch->ch_neo_uart->ier);  in neo_set_cts_flow_control()
83 	writeb(0, &ch->ch_neo_uart->efr);  in neo_set_rts_flow_control()
86 	writeb(efr, &ch->ch_neo_uart->efr);  in neo_set_rts_flow_control()
88 	writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), &ch->ch_neo_uart->fctr);  in neo_set_rts_flow_control()
91 	writeb(56, &ch->ch_neo_uart->rfifo);  in neo_set_rts_flow_control()
94 	writeb(ier, &ch->ch_neo_uart->ier);  in neo_set_rts_flow_control()
122 	writeb(0, &ch->ch_neo_uart->efr);  in neo_set_ixon_flow_control()
125 	writeb(efr, &ch->ch_neo_uart->efr);  in neo_set_ixon_flow_control()
127 	writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr);  in neo_set_ixon_flow_control()
130 	writeb(32, &ch->ch_neo_uart->rfifo);  in neo_set_ixon_flow_control()
134 	writeb(ch->ch_startc, &ch->ch_neo_uart->xonchar1);  in neo_set_ixon_flow_control()
135 	writeb(0, &ch->ch_neo_uart->xonchar2);  in neo_set_ixon_flow_control()
137 	writeb(ch->ch_stopc, &ch->ch_neo_uart->xoffchar1);  in neo_set_ixon_flow_control()
138 	writeb(0, &ch->ch_neo_uart->xoffchar2);  in neo_set_ixon_flow_control()
140 	writeb(ier, &ch->ch_neo_uart->ier);  in neo_set_ixon_flow_control()
160 	writeb(0, &ch->ch_neo_uart->efr);  in neo_set_ixoff_flow_control()
163 	writeb(efr, &ch->ch_neo_uart->efr);  in neo_set_ixoff_flow_control()
166 	writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr);  in neo_set_ixoff_flow_control()
168 	writeb(8, &ch->ch_neo_uart->tfifo);  in neo_set_ixoff_flow_control()
172 	writeb(ch->ch_startc, &ch->ch_neo_uart->xonchar1);  in neo_set_ixoff_flow_control()
173 	writeb(0, &ch->ch_neo_uart->xonchar2);  in neo_set_ixoff_flow_control()
175 	writeb(ch->ch_stopc, &ch->ch_neo_uart->xoffchar1);  in neo_set_ixoff_flow_control()
176 	writeb(0, &ch->ch_neo_uart->xoffchar2);  in neo_set_ixoff_flow_control()
178 	writeb(ier, &ch->ch_neo_uart->ier);  in neo_set_ixoff_flow_control()
201 	writeb(0, &ch->ch_neo_uart->efr);  in neo_set_no_input_flow_control()
204 	writeb(efr, &ch->ch_neo_uart->efr);  in neo_set_no_input_flow_control()
207 	writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr);  in neo_set_no_input_flow_control()
211 	writeb(16, &ch->ch_neo_uart->tfifo);  in neo_set_no_input_flow_control()
214 	writeb(16, &ch->ch_neo_uart->rfifo);  in neo_set_no_input_flow_control()
217 	writeb(ier, &ch->ch_neo_uart->ier);  in neo_set_no_input_flow_control()
239 	writeb(0, &ch->ch_neo_uart->efr);  in neo_set_no_output_flow_control()
242 	writeb(efr, &ch->ch_neo_uart->efr);  in neo_set_no_output_flow_control()
245 	writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr);  in neo_set_no_output_flow_control()
249 	writeb(16, &ch->ch_neo_uart->tfifo);  in neo_set_no_output_flow_control()
252 	writeb(16, &ch->ch_neo_uart->rfifo);  in neo_set_no_output_flow_control()
255 	writeb(ier, &ch->ch_neo_uart->ier);  in neo_set_no_output_flow_control()
268 	writeb(ch->ch_startc, &ch->ch_neo_uart->xonchar1);  in neo_set_new_start_stop_chars()
269 	writeb(0, &ch->ch_neo_uart->xonchar2);  in neo_set_new_start_stop_chars()
271 	writeb(ch->ch_stopc, &ch->ch_neo_uart->xoffchar1);  in neo_set_new_start_stop_chars()
272 	writeb(0, &ch->ch_neo_uart->xoffchar2);  in neo_set_new_start_stop_chars()
506 			writeb(circ->buf[circ->tail], &ch->ch_neo_uart->txrx);  in neo_copy_data_from_queue_to_uart()
610 	writeb(ch->ch_mostat, &ch->ch_neo_uart->mcr);  in neo_assert_modem_signals()
629 	writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_XMIT), &ch->ch_neo_uart->isr_fcr);  in neo_flush_uart_write()
661 	writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR), &ch->ch_neo_uart->isr_fcr);  in neo_flush_uart_read()
689 		writeb((temp & ~UART_LCR_SBC), &ch->ch_neo_uart->lcr);  in neo_clear_break()
1031 		writeb(UART_LCR_DLAB, &ch->ch_neo_uart->lcr);  in neo_param()
1032 		writeb((quot & 0xff), &ch->ch_neo_uart->txrx);  in neo_param()
1033 		writeb((quot >> 8), &ch->ch_neo_uart->ier);  in neo_param()
1034 		writeb(lcr, &ch->ch_neo_uart->lcr);  in neo_param()
1038 		writeb(lcr, &ch->ch_neo_uart->lcr);  in neo_param()
1045 	writeb(ier, &ch->ch_neo_uart->ier);  in neo_param()
1079 		writeb(1, &ch->ch_neo_uart->rfifo);  in neo_param()
1246 	writeb(tmp, &ch->ch_neo_uart->ier);  in neo_disable_receiver()
1262 	writeb(tmp, &ch->ch_neo_uart->ier);  in neo_enable_receiver()
1275 		writeb(ch->ch_startc, &ch->ch_neo_uart->txrx);  in neo_send_start_character()
1289 		writeb(ch->ch_stopc, &ch->ch_neo_uart->txrx);  in neo_send_stop_character()
1301 	writeb(0, &ch->ch_neo_uart->ier);  in neo_uart_init()
1302 	writeb(0, &ch->ch_neo_uart->efr);  in neo_uart_init()
1303 	writeb(UART_EFR_ECB, &ch->ch_neo_uart->efr);  in neo_uart_init()
1307 	writeb((UART_FCR_ENABLE_FIFO|UART_FCR_CLEAR_RCVR|UART_FCR_CLEAR_XMIT), &ch->ch_neo_uart->isr_fcr);  in neo_uart_init()
1314 	writeb(ch->ch_mostat, &ch->ch_neo_uart->mcr);  in neo_uart_init()
1323 	writeb(0, &ch->ch_neo_uart->efr);  in neo_uart_off()
1326 	writeb(0, &ch->ch_neo_uart->ier);  in neo_uart_off()
1360 		writeb((temp | UART_LCR_SBC), &ch->ch_neo_uart->lcr);  in neo_send_break()
1381 	writeb(c, &ch->ch_neo_uart->txrx);  in neo_send_immediate_char()