Lines Matching refs:membase
294 return readl(port->membase + off); in lpuart32_read()
296 return ioread32be(port->membase + off); in lpuart32_read()
307 writel(val, port->membase + off); in lpuart32_write()
310 iowrite32be(val, port->membase + off); in lpuart32_write()
319 temp = readb(port->membase + UARTCR2); in lpuart_stop_tx()
321 writeb(temp, port->membase + UARTCR2); in lpuart_stop_tx()
337 temp = readb(port->membase + UARTCR2); in lpuart_stop_rx()
338 writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2); in lpuart_stop_rx()
476 writeb(0, sport->port.membase + UARTCR2); in lpuart_poll_init()
478 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_poll_init()
481 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
485 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
488 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
489 readb(sport->port.membase + UARTDR); in lpuart_poll_init()
490 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_poll_init()
493 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_poll_init()
494 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_poll_init()
497 writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2); in lpuart_poll_init()
506 while (!(readb(port->membase + UARTSR1) & UARTSR1_TDRE)) in lpuart_poll_put_char()
509 writeb(c, port->membase + UARTDR); in lpuart_poll_put_char()
514 if (!(readb(port->membase + UARTSR1) & UARTSR1_RDRF)) in lpuart_poll_get_char()
517 return readb(port->membase + UARTDR); in lpuart_poll_get_char()
531 writel(0, sport->port.membase + UARTCTRL); in lpuart32_poll_init()
533 temp = readl(sport->port.membase + UARTFIFO); in lpuart32_poll_init()
537 sport->port.membase + UARTFIFO); in lpuart32_poll_init()
541 sport->port.membase + UARTFIFO); in lpuart32_poll_init()
544 if (readl(sport->port.membase + UARTSTAT) & UARTSTAT_RDRF) { in lpuart32_poll_init()
545 readl(sport->port.membase + UARTDATA); in lpuart32_poll_init()
546 writel(UARTFIFO_RXUF, sport->port.membase + UARTFIFO); in lpuart32_poll_init()
550 writel(UARTCTRL_RE | UARTCTRL_TE, sport->port.membase + UARTCTRL); in lpuart32_poll_init()
558 while (!(readl(port->membase + UARTSTAT) & UARTSTAT_TDRE)) in lpuart32_poll_put_char()
561 writel(c, port->membase + UARTDATA); in lpuart32_poll_put_char()
566 if (!(readl(port->membase + UARTSTAT) & UARTSTAT_RDRF)) in lpuart32_poll_get_char()
569 return readl(port->membase + UARTDATA); in lpuart32_poll_get_char()
578 (readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) { in lpuart_transmit_buffer()
579 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); in lpuart_transmit_buffer()
622 temp = readb(port->membase + UARTCR2); in lpuart_start_tx()
623 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); in lpuart_start_tx()
629 if (readb(port->membase + UARTSR1) & UARTSR1_TDRE) in lpuart_start_tx()
651 unsigned char sr1 = readb(port->membase + UARTSR1); in lpuart_tx_empty()
652 unsigned char sfifo = readb(port->membase + UARTSFIFO); in lpuart_tx_empty()
686 writeb(sport->port.x_char, sport->port.membase + UARTDR); in lpuart_txint()
721 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
728 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
729 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
843 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
884 sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
888 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1044 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1045 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1072 u8 modem = readb(sport->port.membase + UARTMODEM) & in lpuart_config_rs485()
1074 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1113 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1122 reg = readb(port->membase + UARTMODEM); in lpuart_get_mctrl()
1155 temp = readb(sport->port.membase + UARTMODEM) & in lpuart_set_mctrl()
1164 writeb(temp, port->membase + UARTMODEM); in lpuart_set_mctrl()
1188 temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK; in lpuart_break_ctl()
1193 writeb(temp, port->membase + UARTCR2); in lpuart_break_ctl()
1213 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1217 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1219 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1221 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1225 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1228 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1229 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1230 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1233 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1234 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1237 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1279 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1293 temp = readb(sport->port.membase + UARTCR2); in lpuart_startup()
1295 writeb(temp, sport->port.membase + UARTCR2); in lpuart_startup()
1312 temp = readb(port->membase + UARTCR5); in lpuart_startup()
1313 writeb(temp | UARTCR5_TDMAS, port->membase + UARTCR5); in lpuart_startup()
1360 temp = readb(port->membase + UARTCR2); in lpuart_shutdown()
1363 writeb(temp, port->membase + UARTCR2); in lpuart_shutdown()
1410 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1411 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1412 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_set_termios()
1413 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1414 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1415 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
1523 while (!(readb(sport->port.membase + UARTSR1) & UARTSR1_TC)) in lpuart_set_termios()
1528 sport->port.membase + UARTCR2); in lpuart_set_termios()
1536 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
1537 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
1538 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
1539 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_set_termios()
1540 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
1541 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
1544 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
1831 while (!(readb(port->membase + UARTSR1) & UARTSR1_TDRE)) in lpuart_console_putchar()
1834 writeb(ch, port->membase + UARTDR); in lpuart_console_putchar()
1859 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
1862 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
1867 while (!(readb(sport->port.membase + UARTSR1) & UARTSR1_TC)) in lpuart_console_write()
1870 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
1918 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
1925 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
1940 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
1942 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
1946 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2077 if (!device->port.membase) in lpuart_early_console_setup()
2087 if (!device->port.membase) in lpuart32_early_console_setup()
2098 if (!device->port.membase) in lpuart32_imx_early_console_setup()
2102 device->port.membase += IMX_REG_OFF; in lpuart32_imx_early_console_setup()
2155 sport->port.membase = devm_ioremap_resource(&pdev->dev, res); in lpuart_probe()
2156 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2157 return PTR_ERR(sport->port.membase); in lpuart_probe()
2159 sport->port.membase += sdata->reg_off; in lpuart_probe()
2274 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
2276 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
2298 writeb(readb(sport->port.membase + UARTCR5) & ~UARTCR5_RDMAS, in lpuart_suspend()
2299 sport->port.membase + UARTCR5); in lpuart_suspend()
2330 temp = readb(sport->port.membase + UARTCR2); in lpuart_resume()
2332 writeb(temp, sport->port.membase + UARTCR2); in lpuart_resume()
2347 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_resume()
2348 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_resume()