Lines Matching refs:uap
283 static unsigned int pl011_reg_to_offset(const struct uart_amba_port *uap, in pl011_reg_to_offset() argument
286 return uap->reg_offset[reg]; in pl011_reg_to_offset()
289 static unsigned int pl011_read(const struct uart_amba_port *uap, in pl011_read() argument
292 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_read()
294 return (uap->port.iotype == UPIO_MEM32) ? in pl011_read()
298 static void pl011_write(unsigned int val, const struct uart_amba_port *uap, in pl011_write() argument
301 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_write()
303 if (uap->port.iotype == UPIO_MEM32) in pl011_write()
314 static int pl011_fifo_to_tty(struct uart_amba_port *uap) in pl011_fifo_to_tty() argument
320 status = pl011_read(uap, REG_FR); in pl011_fifo_to_tty()
325 ch = pl011_read(uap, REG_DR) | UART_DUMMY_DR_RX; in pl011_fifo_to_tty()
327 uap->port.icount.rx++; in pl011_fifo_to_tty()
332 uap->port.icount.brk++; in pl011_fifo_to_tty()
333 if (uart_handle_break(&uap->port)) in pl011_fifo_to_tty()
336 uap->port.icount.parity++; in pl011_fifo_to_tty()
338 uap->port.icount.frame++; in pl011_fifo_to_tty()
340 uap->port.icount.overrun++; in pl011_fifo_to_tty()
342 ch &= uap->port.read_status_mask; in pl011_fifo_to_tty()
352 if (uart_handle_sysrq_char(&uap->port, ch & 255)) in pl011_fifo_to_tty()
355 uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag); in pl011_fifo_to_tty()
400 static void pl011_dma_probe(struct uart_amba_port *uap) in pl011_dma_probe() argument
403 struct amba_pl011_data *plat = dev_get_platdata(uap->port.dev); in pl011_dma_probe()
404 struct device *dev = uap->port.dev; in pl011_dma_probe()
406 .dst_addr = uap->port.mapbase + in pl011_dma_probe()
407 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
410 .dst_maxburst = uap->fifosize >> 1, in pl011_dma_probe()
416 uap->dma_probed = true; in pl011_dma_probe()
420 uap->dma_probed = false; in pl011_dma_probe()
426 dev_info(uap->port.dev, "no DMA platform data\n"); in pl011_dma_probe()
437 dev_err(uap->port.dev, "no TX DMA channel!\n"); in pl011_dma_probe()
443 uap->dmatx.chan = chan; in pl011_dma_probe()
445 dev_info(uap->port.dev, "DMA channel TX %s\n", in pl011_dma_probe()
446 dma_chan_name(uap->dmatx.chan)); in pl011_dma_probe()
455 dev_err(uap->port.dev, "no RX DMA channel!\n"); in pl011_dma_probe()
462 .src_addr = uap->port.mapbase + in pl011_dma_probe()
463 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
466 .src_maxburst = uap->fifosize >> 2, in pl011_dma_probe()
480 dev_info(uap->port.dev, in pl011_dma_probe()
486 uap->dmarx.chan = chan; in pl011_dma_probe()
488 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
492 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
493 uap->dmarx.poll_rate = plat->dma_rx_poll_rate; in pl011_dma_probe()
500 uap->dmarx.auto_poll_rate = true; in pl011_dma_probe()
501 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
505 uap->dmarx.poll_timeout = in pl011_dma_probe()
508 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
510 uap->dmarx.auto_poll_rate = of_property_read_bool( in pl011_dma_probe()
512 if (uap->dmarx.auto_poll_rate) { in pl011_dma_probe()
517 uap->dmarx.poll_rate = x; in pl011_dma_probe()
519 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
522 uap->dmarx.poll_timeout = x; in pl011_dma_probe()
524 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
527 dev_info(uap->port.dev, "DMA channel RX %s\n", in pl011_dma_probe()
528 dma_chan_name(uap->dmarx.chan)); in pl011_dma_probe()
532 static void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
534 if (uap->dmatx.chan) in pl011_dma_remove()
535 dma_release_channel(uap->dmatx.chan); in pl011_dma_remove()
536 if (uap->dmarx.chan) in pl011_dma_remove()
537 dma_release_channel(uap->dmarx.chan); in pl011_dma_remove()
541 static int pl011_dma_tx_refill(struct uart_amba_port *uap);
542 static void pl011_start_tx_pio(struct uart_amba_port *uap);
550 struct uart_amba_port *uap = data; in pl011_dma_tx_callback() local
551 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_callback()
555 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_tx_callback()
556 if (uap->dmatx.queued) in pl011_dma_tx_callback()
560 dmacr = uap->dmacr; in pl011_dma_tx_callback()
561 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
562 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
573 if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || in pl011_dma_tx_callback()
574 uart_circ_empty(&uap->port.state->xmit)) { in pl011_dma_tx_callback()
575 uap->dmatx.queued = false; in pl011_dma_tx_callback()
576 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
580 if (pl011_dma_tx_refill(uap) <= 0) in pl011_dma_tx_callback()
585 pl011_start_tx_pio(uap); in pl011_dma_tx_callback()
587 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
598 static int pl011_dma_tx_refill(struct uart_amba_port *uap) in pl011_dma_tx_refill() argument
600 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_refill()
604 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_dma_tx_refill()
614 if (count < (uap->fifosize >> 1)) { in pl011_dma_tx_refill()
615 uap->dmatx.queued = false; in pl011_dma_tx_refill()
647 uap->dmatx.queued = false; in pl011_dma_tx_refill()
648 dev_dbg(uap->port.dev, "unable to map TX DMA\n"); in pl011_dma_tx_refill()
656 uap->dmatx.queued = false; in pl011_dma_tx_refill()
661 dev_dbg(uap->port.dev, "TX DMA busy\n"); in pl011_dma_tx_refill()
667 desc->callback_param = uap; in pl011_dma_tx_refill()
675 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
676 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
677 uap->dmatx.queued = true; in pl011_dma_tx_refill()
684 uap->port.icount.tx += count; in pl011_dma_tx_refill()
687 uart_write_wakeup(&uap->port); in pl011_dma_tx_refill()
700 static bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
702 if (!uap->using_tx_dma) in pl011_dma_tx_irq()
710 if (uap->dmatx.queued) { in pl011_dma_tx_irq()
711 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
712 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
713 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
714 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
722 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_irq()
723 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
724 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
734 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
736 if (uap->dmatx.queued) { in pl011_dma_tx_stop()
737 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_stop()
738 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_stop()
750 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
754 if (!uap->using_tx_dma) in pl011_dma_tx_start()
757 if (!uap->port.x_char) { in pl011_dma_tx_start()
761 if (!uap->dmatx.queued) { in pl011_dma_tx_start()
762 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_start()
763 uap->im &= ~UART011_TXIM; in pl011_dma_tx_start()
764 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_start()
767 } else if (!(uap->dmacr & UART011_TXDMAE)) { in pl011_dma_tx_start()
768 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_start()
769 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
778 dmacr = uap->dmacr; in pl011_dma_tx_start()
779 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_start()
780 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
782 if (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) { in pl011_dma_tx_start()
791 pl011_write(uap->port.x_char, uap, REG_DR); in pl011_dma_tx_start()
792 uap->port.icount.tx++; in pl011_dma_tx_start()
793 uap->port.x_char = 0; in pl011_dma_tx_start()
796 uap->dmacr = dmacr; in pl011_dma_tx_start()
797 pl011_write(dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
807 __releases(&uap->port.lock) in pl011_dma_flush_buffer()
808 __acquires(&uap->port.lock) in pl011_dma_flush_buffer()
810 struct uart_amba_port *uap = in pl011_dma_flush_buffer() local
813 if (!uap->using_tx_dma) in pl011_dma_flush_buffer()
817 spin_unlock(&uap->port.lock); in pl011_dma_flush_buffer()
818 dmaengine_terminate_all(uap->dmatx.chan); in pl011_dma_flush_buffer()
819 spin_lock(&uap->port.lock); in pl011_dma_flush_buffer()
820 if (uap->dmatx.queued) { in pl011_dma_flush_buffer()
821 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_flush_buffer()
823 uap->dmatx.queued = false; in pl011_dma_flush_buffer()
824 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_flush_buffer()
825 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_flush_buffer()
831 static int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
833 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_trigger_dma()
834 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_trigger_dma()
842 sgbuf = uap->dmarx.use_buf_b ? in pl011_dma_rx_trigger_dma()
843 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_trigger_dma()
853 uap->dmarx.running = false; in pl011_dma_rx_trigger_dma()
860 desc->callback_param = uap; in pl011_dma_rx_trigger_dma()
864 uap->dmacr |= UART011_RXDMAE; in pl011_dma_rx_trigger_dma()
865 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_trigger_dma()
866 uap->dmarx.running = true; in pl011_dma_rx_trigger_dma()
868 uap->im &= ~UART011_RXIM; in pl011_dma_rx_trigger_dma()
869 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_trigger_dma()
879 static void pl011_dma_rx_chars(struct uart_amba_port *uap, in pl011_dma_rx_chars() argument
883 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_chars()
885 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_chars()
889 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_chars()
892 if (uap->dmarx.poll_rate) { in pl011_dma_rx_chars()
911 uap->port.icount.rx += dma_count; in pl011_dma_rx_chars()
913 dev_warn(uap->port.dev, in pl011_dma_rx_chars()
918 if (uap->dmarx.poll_rate) in pl011_dma_rx_chars()
928 UART011_FEIS, uap, REG_ICR); in pl011_dma_rx_chars()
941 fifotaken = pl011_fifo_to_tty(uap); in pl011_dma_rx_chars()
944 spin_unlock(&uap->port.lock); in pl011_dma_rx_chars()
945 dev_vdbg(uap->port.dev, in pl011_dma_rx_chars()
949 spin_lock(&uap->port.lock); in pl011_dma_rx_chars()
952 static void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
954 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_irq()
968 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
972 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
975 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_irq()
976 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_irq()
977 uap->dmarx.running = false; in pl011_dma_rx_irq()
988 pl011_dma_rx_chars(uap, pending, dmarx->use_buf_b, true); in pl011_dma_rx_irq()
992 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_dma_rx_irq()
993 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_irq()
995 uap->im |= UART011_RXIM; in pl011_dma_rx_irq()
996 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_irq()
1002 struct uart_amba_port *uap = data; in pl011_dma_rx_callback() local
1003 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_callback()
1019 spin_lock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1030 uap->dmarx.running = false; in pl011_dma_rx_callback()
1032 ret = pl011_dma_rx_trigger_dma(uap); in pl011_dma_rx_callback()
1034 pl011_dma_rx_chars(uap, pending, lastbuf, false); in pl011_dma_rx_callback()
1035 spin_unlock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1041 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_callback()
1043 uap->im |= UART011_RXIM; in pl011_dma_rx_callback()
1044 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_callback()
1053 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1056 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_stop()
1057 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_stop()
1067 struct uart_amba_port *uap = from_timer(uap, t, dmarx.timer); in pl011_dma_rx_poll() local
1068 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_poll()
1069 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_poll()
1070 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_poll()
1078 sgbuf = dmarx->use_buf_b ? &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_poll()
1096 > uap->dmarx.poll_timeout) { in pl011_dma_rx_poll()
1098 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_rx_poll()
1099 pl011_dma_rx_stop(uap); in pl011_dma_rx_poll()
1100 uap->im |= UART011_RXIM; in pl011_dma_rx_poll()
1101 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_poll()
1102 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_rx_poll()
1104 uap->dmarx.running = false; in pl011_dma_rx_poll()
1106 del_timer(&uap->dmarx.timer); in pl011_dma_rx_poll()
1108 mod_timer(&uap->dmarx.timer, in pl011_dma_rx_poll()
1109 jiffies + msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_rx_poll()
1113 static void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1117 if (!uap->dma_probed) in pl011_dma_startup()
1118 pl011_dma_probe(uap); in pl011_dma_startup()
1120 if (!uap->dmatx.chan) in pl011_dma_startup()
1123 uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL | __GFP_DMA); in pl011_dma_startup()
1124 if (!uap->dmatx.buf) { in pl011_dma_startup()
1125 dev_err(uap->port.dev, "no memory for DMA TX buffer\n"); in pl011_dma_startup()
1126 uap->port.fifosize = uap->fifosize; in pl011_dma_startup()
1130 sg_init_one(&uap->dmatx.sg, uap->dmatx.buf, PL011_DMA_BUFFER_SIZE); in pl011_dma_startup()
1133 uap->port.fifosize = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1134 uap->using_tx_dma = true; in pl011_dma_startup()
1136 if (!uap->dmarx.chan) in pl011_dma_startup()
1140 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1143 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1148 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_b, in pl011_dma_startup()
1151 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1153 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1158 uap->using_rx_dma = true; in pl011_dma_startup()
1162 uap->dmacr |= UART011_DMAONERR; in pl011_dma_startup()
1163 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_startup()
1170 if (uap->vendor->dma_threshold) in pl011_dma_startup()
1172 uap, REG_ST_DMAWM); in pl011_dma_startup()
1174 if (uap->using_rx_dma) { in pl011_dma_startup()
1175 if (pl011_dma_rx_trigger_dma(uap)) in pl011_dma_startup()
1176 dev_dbg(uap->port.dev, "could not trigger initial " in pl011_dma_startup()
1178 if (uap->dmarx.poll_rate) { in pl011_dma_startup()
1179 timer_setup(&uap->dmarx.timer, pl011_dma_rx_poll, 0); in pl011_dma_startup()
1180 mod_timer(&uap->dmarx.timer, in pl011_dma_startup()
1182 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_startup()
1183 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1184 uap->dmarx.last_jiffies = jiffies; in pl011_dma_startup()
1189 static void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1191 if (!(uap->using_tx_dma || uap->using_rx_dma)) in pl011_dma_shutdown()
1195 while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy) in pl011_dma_shutdown()
1198 spin_lock_irq(&uap->port.lock); in pl011_dma_shutdown()
1199 uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE); in pl011_dma_shutdown()
1200 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_shutdown()
1201 spin_unlock_irq(&uap->port.lock); in pl011_dma_shutdown()
1203 if (uap->using_tx_dma) { in pl011_dma_shutdown()
1205 dmaengine_terminate_all(uap->dmatx.chan); in pl011_dma_shutdown()
1206 if (uap->dmatx.queued) { in pl011_dma_shutdown()
1207 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_shutdown()
1209 uap->dmatx.queued = false; in pl011_dma_shutdown()
1212 kfree(uap->dmatx.buf); in pl011_dma_shutdown()
1213 uap->using_tx_dma = false; in pl011_dma_shutdown()
1216 if (uap->using_rx_dma) { in pl011_dma_shutdown()
1217 dmaengine_terminate_all(uap->dmarx.chan); in pl011_dma_shutdown()
1219 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1220 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_b, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1221 if (uap->dmarx.poll_rate) in pl011_dma_shutdown()
1222 del_timer_sync(&uap->dmarx.timer); in pl011_dma_shutdown()
1223 uap->using_rx_dma = false; in pl011_dma_shutdown()
1227 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1229 return uap->using_rx_dma; in pl011_dma_rx_available()
1232 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1234 return uap->using_rx_dma && uap->dmarx.running; in pl011_dma_rx_running()
1239 static inline void pl011_dma_probe(struct uart_amba_port *uap) in pl011_dma_probe() argument
1243 static inline void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
1247 static inline void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1251 static inline void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1255 static inline bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
1260 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
1264 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
1269 static inline void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
1273 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1277 static inline int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
1282 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1287 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1297 struct uart_amba_port *uap = in pl011_stop_tx() local
1300 uap->im &= ~UART011_TXIM; in pl011_stop_tx()
1301 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_tx()
1302 pl011_dma_tx_stop(uap); in pl011_stop_tx()
1305 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq);
1308 static void pl011_start_tx_pio(struct uart_amba_port *uap) in pl011_start_tx_pio() argument
1310 if (pl011_tx_chars(uap, false)) { in pl011_start_tx_pio()
1311 uap->im |= UART011_TXIM; in pl011_start_tx_pio()
1312 pl011_write(uap->im, uap, REG_IMSC); in pl011_start_tx_pio()
1318 struct uart_amba_port *uap = in pl011_start_tx() local
1321 if (!pl011_dma_tx_start(uap)) in pl011_start_tx()
1322 pl011_start_tx_pio(uap); in pl011_start_tx()
1327 struct uart_amba_port *uap = in pl011_stop_rx() local
1330 uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM| in pl011_stop_rx()
1332 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_rx()
1334 pl011_dma_rx_stop(uap); in pl011_stop_rx()
1339 struct uart_amba_port *uap = in pl011_enable_ms() local
1342 uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM; in pl011_enable_ms()
1343 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_ms()
1346 static void pl011_rx_chars(struct uart_amba_port *uap) in pl011_rx_chars() argument
1347 __releases(&uap->port.lock) in pl011_rx_chars()
1348 __acquires(&uap->port.lock) in pl011_rx_chars()
1350 pl011_fifo_to_tty(uap); in pl011_rx_chars()
1352 spin_unlock(&uap->port.lock); in pl011_rx_chars()
1353 tty_flip_buffer_push(&uap->port.state->port); in pl011_rx_chars()
1358 if (pl011_dma_rx_available(uap)) { in pl011_rx_chars()
1359 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_rx_chars()
1360 dev_dbg(uap->port.dev, "could not trigger RX DMA job " in pl011_rx_chars()
1362 uap->im |= UART011_RXIM; in pl011_rx_chars()
1363 pl011_write(uap->im, uap, REG_IMSC); in pl011_rx_chars()
1367 if (uap->dmarx.poll_rate) { in pl011_rx_chars()
1368 uap->dmarx.last_jiffies = jiffies; in pl011_rx_chars()
1369 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_rx_chars()
1370 mod_timer(&uap->dmarx.timer, in pl011_rx_chars()
1372 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_rx_chars()
1377 spin_lock(&uap->port.lock); in pl011_rx_chars()
1380 static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c, in pl011_tx_char() argument
1384 pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_tx_char()
1387 pl011_write(c, uap, REG_DR); in pl011_tx_char()
1388 uap->port.icount.tx++; in pl011_tx_char()
1394 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq) in pl011_tx_chars() argument
1396 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_tx_chars()
1397 int count = uap->fifosize >> 1; in pl011_tx_chars()
1399 if (uap->port.x_char) { in pl011_tx_chars()
1400 if (!pl011_tx_char(uap, uap->port.x_char, from_irq)) in pl011_tx_chars()
1402 uap->port.x_char = 0; in pl011_tx_chars()
1405 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { in pl011_tx_chars()
1406 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1411 if (pl011_dma_tx_irq(uap)) in pl011_tx_chars()
1418 if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq)) in pl011_tx_chars()
1425 uart_write_wakeup(&uap->port); in pl011_tx_chars()
1428 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1434 static void pl011_modem_status(struct uart_amba_port *uap) in pl011_modem_status() argument
1438 status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_modem_status()
1440 delta = status ^ uap->old_status; in pl011_modem_status()
1441 uap->old_status = status; in pl011_modem_status()
1447 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD); in pl011_modem_status()
1449 if (delta & uap->vendor->fr_dsr) in pl011_modem_status()
1450 uap->port.icount.dsr++; in pl011_modem_status()
1452 if (delta & uap->vendor->fr_cts) in pl011_modem_status()
1453 uart_handle_cts_change(&uap->port, in pl011_modem_status()
1454 status & uap->vendor->fr_cts); in pl011_modem_status()
1456 wake_up_interruptible(&uap->port.state->port.delta_msr_wait); in pl011_modem_status()
1459 static void check_apply_cts_event_workaround(struct uart_amba_port *uap) in check_apply_cts_event_workaround() argument
1463 if (!uap->vendor->cts_event_workaround) in check_apply_cts_event_workaround()
1467 pl011_write(0x00, uap, REG_ICR); in check_apply_cts_event_workaround()
1474 dummy_read = pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1475 dummy_read = pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1480 struct uart_amba_port *uap = dev_id; in pl011_int() local
1485 spin_lock_irqsave(&uap->port.lock, flags); in pl011_int()
1486 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1489 check_apply_cts_event_workaround(uap); in pl011_int()
1493 uap, REG_ICR); in pl011_int()
1496 if (pl011_dma_rx_running(uap)) in pl011_int()
1497 pl011_dma_rx_irq(uap); in pl011_int()
1499 pl011_rx_chars(uap); in pl011_int()
1503 pl011_modem_status(uap); in pl011_int()
1505 pl011_tx_chars(uap, true); in pl011_int()
1510 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1515 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_int()
1522 struct uart_amba_port *uap = in pl011_tx_empty() local
1526 unsigned int status = pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr; in pl011_tx_empty()
1528 return status & (uap->vendor->fr_busy | UART01x_FR_TXFF) ? in pl011_tx_empty()
1534 struct uart_amba_port *uap = in pl011_get_mctrl() local
1537 unsigned int status = pl011_read(uap, REG_FR); in pl011_get_mctrl()
1544 TIOCMBIT(uap->vendor->fr_dsr, TIOCM_DSR); in pl011_get_mctrl()
1545 TIOCMBIT(uap->vendor->fr_cts, TIOCM_CTS); in pl011_get_mctrl()
1546 TIOCMBIT(uap->vendor->fr_ri, TIOCM_RNG); in pl011_get_mctrl()
1553 struct uart_amba_port *uap = in pl011_set_mctrl() local
1557 cr = pl011_read(uap, REG_CR); in pl011_set_mctrl()
1577 pl011_write(cr, uap, REG_CR); in pl011_set_mctrl()
1582 struct uart_amba_port *uap = in pl011_break_ctl() local
1587 spin_lock_irqsave(&uap->port.lock, flags); in pl011_break_ctl()
1588 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_break_ctl()
1593 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_break_ctl()
1594 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_break_ctl()
1601 struct uart_amba_port *uap = in pl011_quiesce_irqs() local
1604 pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR); in pl011_quiesce_irqs()
1618 pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap, in pl011_quiesce_irqs()
1624 struct uart_amba_port *uap = in pl011_get_poll_char() local
1634 status = pl011_read(uap, REG_FR); in pl011_get_poll_char()
1638 return pl011_read(uap, REG_DR); in pl011_get_poll_char()
1644 struct uart_amba_port *uap = in pl011_put_poll_char() local
1647 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_put_poll_char()
1650 pl011_write(ch, uap, REG_DR); in pl011_put_poll_char()
1657 struct uart_amba_port *uap = in pl011_hwinit() local
1667 retval = clk_prepare_enable(uap->clk); in pl011_hwinit()
1671 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_hwinit()
1676 uap, REG_ICR); in pl011_hwinit()
1682 uap->im = pl011_read(uap, REG_IMSC); in pl011_hwinit()
1683 pl011_write(UART011_RTIM | UART011_RXIM, uap, REG_IMSC); in pl011_hwinit()
1685 if (dev_get_platdata(uap->port.dev)) { in pl011_hwinit()
1688 plat = dev_get_platdata(uap->port.dev); in pl011_hwinit()
1695 static bool pl011_split_lcrh(const struct uart_amba_port *uap) in pl011_split_lcrh() argument
1697 return pl011_reg_to_offset(uap, REG_LCRH_RX) != in pl011_split_lcrh()
1698 pl011_reg_to_offset(uap, REG_LCRH_TX); in pl011_split_lcrh()
1701 static void pl011_write_lcr_h(struct uart_amba_port *uap, unsigned int lcr_h) in pl011_write_lcr_h() argument
1703 pl011_write(lcr_h, uap, REG_LCRH_RX); in pl011_write_lcr_h()
1704 if (pl011_split_lcrh(uap)) { in pl011_write_lcr_h()
1711 pl011_write(0xff, uap, REG_MIS); in pl011_write_lcr_h()
1712 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_write_lcr_h()
1716 static int pl011_allocate_irq(struct uart_amba_port *uap) in pl011_allocate_irq() argument
1718 pl011_write(uap->im, uap, REG_IMSC); in pl011_allocate_irq()
1720 return request_irq(uap->port.irq, pl011_int, 0, "uart-pl011", uap); in pl011_allocate_irq()
1728 static void pl011_enable_interrupts(struct uart_amba_port *uap) in pl011_enable_interrupts() argument
1732 spin_lock_irq(&uap->port.lock); in pl011_enable_interrupts()
1735 pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR); in pl011_enable_interrupts()
1743 for (i = 0; i < uap->fifosize * 2; ++i) { in pl011_enable_interrupts()
1744 if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE) in pl011_enable_interrupts()
1747 pl011_read(uap, REG_DR); in pl011_enable_interrupts()
1750 uap->im = UART011_RTIM; in pl011_enable_interrupts()
1751 if (!pl011_dma_rx_running(uap)) in pl011_enable_interrupts()
1752 uap->im |= UART011_RXIM; in pl011_enable_interrupts()
1753 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_interrupts()
1754 spin_unlock_irq(&uap->port.lock); in pl011_enable_interrupts()
1759 struct uart_amba_port *uap = in pl011_startup() local
1768 retval = pl011_allocate_irq(uap); in pl011_startup()
1772 pl011_write(uap->vendor->ifls, uap, REG_IFLS); in pl011_startup()
1774 spin_lock_irq(&uap->port.lock); in pl011_startup()
1777 cr = uap->old_cr & (UART011_CR_RTS | UART011_CR_DTR); in pl011_startup()
1779 pl011_write(cr, uap, REG_CR); in pl011_startup()
1781 spin_unlock_irq(&uap->port.lock); in pl011_startup()
1786 uap->old_status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_startup()
1789 pl011_dma_startup(uap); in pl011_startup()
1791 pl011_enable_interrupts(uap); in pl011_startup()
1796 clk_disable_unprepare(uap->clk); in pl011_startup()
1802 struct uart_amba_port *uap = in sbsa_uart_startup() local
1810 retval = pl011_allocate_irq(uap); in sbsa_uart_startup()
1815 uap->old_status = 0; in sbsa_uart_startup()
1817 pl011_enable_interrupts(uap); in sbsa_uart_startup()
1822 static void pl011_shutdown_channel(struct uart_amba_port *uap, in pl011_shutdown_channel() argument
1827 val = pl011_read(uap, lcrh); in pl011_shutdown_channel()
1829 pl011_write(val, uap, lcrh); in pl011_shutdown_channel()
1837 static void pl011_disable_uart(struct uart_amba_port *uap) in pl011_disable_uart() argument
1841 uap->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in pl011_disable_uart()
1842 spin_lock_irq(&uap->port.lock); in pl011_disable_uart()
1843 cr = pl011_read(uap, REG_CR); in pl011_disable_uart()
1844 uap->old_cr = cr; in pl011_disable_uart()
1847 pl011_write(cr, uap, REG_CR); in pl011_disable_uart()
1848 spin_unlock_irq(&uap->port.lock); in pl011_disable_uart()
1853 pl011_shutdown_channel(uap, REG_LCRH_RX); in pl011_disable_uart()
1854 if (pl011_split_lcrh(uap)) in pl011_disable_uart()
1855 pl011_shutdown_channel(uap, REG_LCRH_TX); in pl011_disable_uart()
1858 static void pl011_disable_interrupts(struct uart_amba_port *uap) in pl011_disable_interrupts() argument
1860 spin_lock_irq(&uap->port.lock); in pl011_disable_interrupts()
1863 uap->im = 0; in pl011_disable_interrupts()
1864 pl011_write(uap->im, uap, REG_IMSC); in pl011_disable_interrupts()
1865 pl011_write(0xffff, uap, REG_ICR); in pl011_disable_interrupts()
1867 spin_unlock_irq(&uap->port.lock); in pl011_disable_interrupts()
1872 struct uart_amba_port *uap = in pl011_shutdown() local
1875 pl011_disable_interrupts(uap); in pl011_shutdown()
1877 pl011_dma_shutdown(uap); in pl011_shutdown()
1879 free_irq(uap->port.irq, uap); in pl011_shutdown()
1881 pl011_disable_uart(uap); in pl011_shutdown()
1886 clk_disable_unprepare(uap->clk); in pl011_shutdown()
1890 if (dev_get_platdata(uap->port.dev)) { in pl011_shutdown()
1893 plat = dev_get_platdata(uap->port.dev); in pl011_shutdown()
1898 if (uap->port.ops->flush_buffer) in pl011_shutdown()
1899 uap->port.ops->flush_buffer(port); in pl011_shutdown()
1904 struct uart_amba_port *uap = in sbsa_uart_shutdown() local
1907 pl011_disable_interrupts(uap); in sbsa_uart_shutdown()
1909 free_irq(uap->port.irq, uap); in sbsa_uart_shutdown()
1911 if (uap->port.ops->flush_buffer) in sbsa_uart_shutdown()
1912 uap->port.ops->flush_buffer(port); in sbsa_uart_shutdown()
1951 struct uart_amba_port *uap = in pl011_set_termios() local
1957 if (uap->vendor->oversampling) in pl011_set_termios()
1971 if (uap->dmarx.auto_poll_rate) in pl011_set_termios()
1972 uap->dmarx.poll_rate = DIV_ROUND_UP(10000000, baud); in pl011_set_termios()
2003 if (uap->fifosize > 1) in pl011_set_termios()
2019 old_cr = pl011_read(uap, REG_CR); in pl011_set_termios()
2020 pl011_write(0, uap, REG_CR); in pl011_set_termios()
2033 if (uap->vendor->oversampling) { in pl011_set_termios()
2046 if (uap->vendor->oversampling) { in pl011_set_termios()
2053 pl011_write(quot & 0x3f, uap, REG_FBRD); in pl011_set_termios()
2054 pl011_write(quot >> 6, uap, REG_IBRD); in pl011_set_termios()
2062 pl011_write_lcr_h(uap, lcr_h); in pl011_set_termios()
2063 pl011_write(old_cr, uap, REG_CR); in pl011_set_termios()
2072 struct uart_amba_port *uap = in sbsa_uart_set_termios() local
2076 tty_termios_encode_baud_rate(termios, uap->fixed_baud, uap->fixed_baud); in sbsa_uart_set_termios()
2084 uart_update_timeout(port, CS8, uap->fixed_baud); in sbsa_uart_set_termios()
2091 struct uart_amba_port *uap = in pl011_type() local
2093 return uap->port.type == PORT_AMBA ? uap->type : NULL; in pl011_type()
2201 struct uart_amba_port *uap = in pl011_console_putchar() local
2204 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_console_putchar()
2206 pl011_write(ch, uap, REG_DR); in pl011_console_putchar()
2212 struct uart_amba_port *uap = amba_ports[co->index]; in pl011_console_write() local
2217 clk_enable(uap->clk); in pl011_console_write()
2220 if (uap->port.sysrq) in pl011_console_write()
2223 locked = spin_trylock(&uap->port.lock); in pl011_console_write()
2225 spin_lock(&uap->port.lock); in pl011_console_write()
2230 if (!uap->vendor->always_enabled) { in pl011_console_write()
2231 old_cr = pl011_read(uap, REG_CR); in pl011_console_write()
2234 pl011_write(new_cr, uap, REG_CR); in pl011_console_write()
2237 uart_console_write(&uap->port, s, count, pl011_console_putchar); in pl011_console_write()
2244 while ((pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr) in pl011_console_write()
2245 & uap->vendor->fr_busy) in pl011_console_write()
2247 if (!uap->vendor->always_enabled) in pl011_console_write()
2248 pl011_write(old_cr, uap, REG_CR); in pl011_console_write()
2251 spin_unlock(&uap->port.lock); in pl011_console_write()
2254 clk_disable(uap->clk); in pl011_console_write()
2258 pl011_console_get_options(struct uart_amba_port *uap, int *baud, in pl011_console_get_options() argument
2261 if (pl011_read(uap, REG_CR) & UART01x_CR_UARTEN) { in pl011_console_get_options()
2264 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_console_get_options()
2279 ibrd = pl011_read(uap, REG_IBRD); in pl011_console_get_options()
2280 fbrd = pl011_read(uap, REG_FBRD); in pl011_console_get_options()
2282 *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); in pl011_console_get_options()
2284 if (uap->vendor->oversampling) { in pl011_console_get_options()
2285 if (pl011_read(uap, REG_CR) in pl011_console_get_options()
2294 struct uart_amba_port *uap; in pl011_console_setup() local
2308 uap = amba_ports[co->index]; in pl011_console_setup()
2309 if (!uap) in pl011_console_setup()
2313 pinctrl_pm_select_default_state(uap->port.dev); in pl011_console_setup()
2315 ret = clk_prepare(uap->clk); in pl011_console_setup()
2319 if (dev_get_platdata(uap->port.dev)) { in pl011_console_setup()
2322 plat = dev_get_platdata(uap->port.dev); in pl011_console_setup()
2327 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_console_setup()
2329 if (uap->vendor->fixed_options) { in pl011_console_setup()
2330 baud = uap->fixed_baud; in pl011_console_setup()
2336 pl011_console_get_options(uap, &baud, &parity, &bits); in pl011_console_setup()
2339 return uart_set_options(&uap->port, co, baud, parity, bits, flow); in pl011_console_setup()
2545 static void pl011_unregister_port(struct uart_amba_port *uap) in pl011_unregister_port() argument
2551 if (amba_ports[i] == uap) in pl011_unregister_port()
2556 pl011_dma_remove(uap); in pl011_unregister_port()
2572 static int pl011_setup_port(struct device *dev, struct uart_amba_port *uap, in pl011_setup_port() argument
2583 uap->old_cr = 0; in pl011_setup_port()
2584 uap->port.dev = dev; in pl011_setup_port()
2585 uap->port.mapbase = mmiobase->start; in pl011_setup_port()
2586 uap->port.membase = base; in pl011_setup_port()
2587 uap->port.fifosize = uap->fifosize; in pl011_setup_port()
2588 uap->port.flags = UPF_BOOT_AUTOCONF; in pl011_setup_port()
2589 uap->port.line = index; in pl011_setup_port()
2591 amba_ports[index] = uap; in pl011_setup_port()
2596 static int pl011_register_port(struct uart_amba_port *uap) in pl011_register_port() argument
2601 pl011_write(0, uap, REG_IMSC); in pl011_register_port()
2602 pl011_write(0xffff, uap, REG_ICR); in pl011_register_port()
2607 dev_err(uap->port.dev, in pl011_register_port()
2613 ret = uart_add_one_port(&amba_reg, &uap->port); in pl011_register_port()
2615 pl011_unregister_port(uap); in pl011_register_port()
2622 struct uart_amba_port *uap; in pl011_probe() local
2630 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port), in pl011_probe()
2632 if (!uap) in pl011_probe()
2635 uap->clk = devm_clk_get(&dev->dev, NULL); in pl011_probe()
2636 if (IS_ERR(uap->clk)) in pl011_probe()
2637 return PTR_ERR(uap->clk); in pl011_probe()
2639 uap->reg_offset = vendor->reg_offset; in pl011_probe()
2640 uap->vendor = vendor; in pl011_probe()
2641 uap->fifosize = vendor->get_fifosize(dev); in pl011_probe()
2642 uap->port.iotype = vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in pl011_probe()
2643 uap->port.irq = dev->irq[0]; in pl011_probe()
2644 uap->port.ops = &amba_pl011_pops; in pl011_probe()
2646 snprintf(uap->type, sizeof(uap->type), "PL011 rev%u", amba_rev(dev)); in pl011_probe()
2648 ret = pl011_setup_port(&dev->dev, uap, &dev->res, portnr); in pl011_probe()
2652 amba_set_drvdata(dev, uap); in pl011_probe()
2654 return pl011_register_port(uap); in pl011_probe()
2659 struct uart_amba_port *uap = amba_get_drvdata(dev); in pl011_remove() local
2661 uart_remove_one_port(&amba_reg, &uap->port); in pl011_remove()
2662 pl011_unregister_port(uap); in pl011_remove()
2669 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_suspend() local
2671 if (!uap) in pl011_suspend()
2674 return uart_suspend_port(&amba_reg, &uap->port); in pl011_suspend()
2679 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_resume() local
2681 if (!uap) in pl011_resume()
2684 return uart_resume_port(&amba_reg, &uap->port); in pl011_resume()
2692 struct uart_amba_port *uap; in sbsa_uart_probe() local
2715 uap = devm_kzalloc(&pdev->dev, sizeof(struct uart_amba_port), in sbsa_uart_probe()
2717 if (!uap) in sbsa_uart_probe()
2726 uap->port.irq = ret; in sbsa_uart_probe()
2731 uap->vendor = &vendor_qdt_qdf2400_e44; in sbsa_uart_probe()
2734 uap->vendor = &vendor_sbsa; in sbsa_uart_probe()
2736 uap->reg_offset = uap->vendor->reg_offset; in sbsa_uart_probe()
2737 uap->fifosize = 32; in sbsa_uart_probe()
2738 uap->port.iotype = uap->vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in sbsa_uart_probe()
2739 uap->port.ops = &sbsa_uart_pops; in sbsa_uart_probe()
2740 uap->fixed_baud = baudrate; in sbsa_uart_probe()
2742 snprintf(uap->type, sizeof(uap->type), "SBSA"); in sbsa_uart_probe()
2746 ret = pl011_setup_port(&pdev->dev, uap, r, portnr); in sbsa_uart_probe()
2750 platform_set_drvdata(pdev, uap); in sbsa_uart_probe()
2752 return pl011_register_port(uap); in sbsa_uart_probe()
2757 struct uart_amba_port *uap = platform_get_drvdata(pdev); in sbsa_uart_remove() local
2759 uart_remove_one_port(&amba_reg, &uap->port); in sbsa_uart_remove()
2760 pl011_unregister_port(uap); in sbsa_uart_remove()