267 	unsigned int		im;		/* interrupt mask */  member
713 		uap->im &= ~UART011_TXIM;  in pl011_dma_tx_irq()
714 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_tx_irq()
723 		uap->im &= ~UART011_TXIM;  in pl011_dma_tx_irq()
724 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_tx_irq()
763 				uap->im &= ~UART011_TXIM;  in pl011_dma_tx_start()
764 				pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_tx_start()
868 	uap->im &= ~UART011_RXIM;  in pl011_dma_rx_trigger_dma()
869 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_trigger_dma()
995 		uap->im |= UART011_RXIM;  in pl011_dma_rx_irq()
996 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_irq()
1043 		uap->im |= UART011_RXIM;  in pl011_dma_rx_callback()
1044 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_callback()
1100 		uap->im |= UART011_RXIM;  in pl011_dma_rx_poll()
1101 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_poll()
1300 	uap->im &= ~UART011_TXIM;  in pl011_stop_tx()
1301 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_stop_tx()
1311 		uap->im |= UART011_TXIM;  in pl011_start_tx_pio()
1312 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_start_tx_pio()
1330 	uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM|  in pl011_stop_rx()
1332 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_stop_rx()
1342 	uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM;  in pl011_enable_ms()
1343 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_enable_ms()
1362 			uap->im |= UART011_RXIM;  in pl011_rx_chars()
1363 			pl011_write(uap->im, uap, REG_IMSC);  in pl011_rx_chars()
1486 	status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1510 			status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1682 	uap->im = pl011_read(uap, REG_IMSC);  in pl011_hwinit()
1718 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_allocate_irq()
1750 	uap->im = UART011_RTIM;  in pl011_enable_interrupts()
1752 		uap->im |= UART011_RXIM;  in pl011_enable_interrupts()
1753 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_enable_interrupts()
1863 	uap->im = 0;  in pl011_disable_interrupts()
1864 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_disable_interrupts()