Lines Matching refs:CtlP

222 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
229 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on);
230 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on);
232 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
827 if (cp->CtlP->boardType == ROCKET_TYPE_PC104) { in configure_r_port()
1104 CONTROLLER_t *CtlP = ChP->CtlP; in sGetChanRI() local
1108 if (CtlP->UPCIRingInd) in sGetChanRI()
1109 RingInd = !(sInB(CtlP->UPCIRingInd) & sBitMapSetTbl[ChanNum]); in sGetChanRI()
1110 else if (CtlP->AltChanRingIndicator) in sGetChanRI()
1112 else if (CtlP->boardType == ROCKET_TYPE_PC104) in sGetChanRI()
1113 RingInd = !(sInB(CtlP->AiopIO[3]) & sBitMapSetTbl[ChanNum]); in sGetChanRI()
1728 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model) in rmSpeakerReset() argument
1734 addr = CtlP->AiopIO[0] + 0x4F; in rmSpeakerReset()
1741 addr = CtlP->AiopIO[0] + 0x88; in rmSpeakerReset()
1815 static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum, in sPCIInitController() argument
1824 CtlP->AltChanRingIndicator = altChanRingIndicator; in sPCIInitController()
1825 CtlP->UPCIRingInd = UPCIRingInd; in sPCIInitController()
1826 CtlP->CtlNum = CtlNum; in sPCIInitController()
1827 CtlP->CtlID = CTLID_0001; /* controller release 1 */ in sPCIInitController()
1828 CtlP->BusType = isPCI; /* controller release 1 */ in sPCIInitController()
1831 CtlP->isUPCI = 1; in sPCIInitController()
1832 CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL; in sPCIInitController()
1833 CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL; in sPCIInitController()
1834 CtlP->AiopIntrBits = upci_aiop_intr_bits; in sPCIInitController()
1836 CtlP->isUPCI = 0; in sPCIInitController()
1837 CtlP->PCIIO = in sPCIInitController()
1839 CtlP->AiopIntrBits = aiop_intr_bits; in sPCIInitController()
1842 sPCIControllerEOI(CtlP); /* clear EOI if warm init */ in sPCIInitController()
1844 CtlP->NumAiop = 0; in sPCIInitController()
1847 CtlP->AiopIO[i] = (WordIO_t) io; in sPCIInitController()
1848 CtlP->AiopIntChanIO[i] = io + _INT_CHAN; in sPCIInitController()
1850 CtlP->AiopID[i] = sReadAiopID(io); /* read AIOP ID */ in sPCIInitController()
1851 if (CtlP->AiopID[i] == AIOPID_NULL) /* if AIOP does not exist */ in sPCIInitController()
1854 CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */ in sPCIInitController()
1857 CtlP->NumAiop++; /* bump count of AIOPs */ in sPCIInitController()
1860 if (CtlP->NumAiop == 0) in sPCIInitController()
1863 return (CtlP->NumAiop); in sPCIInitController()
2546 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO, in sInitController() argument
2554 CtlP->AiopIntrBits = aiop_intr_bits; in sInitController()
2555 CtlP->AltChanRingIndicator = 0; in sInitController()
2556 CtlP->CtlNum = CtlNum; in sInitController()
2557 CtlP->CtlID = CTLID_0001; /* controller release 1 */ in sInitController()
2558 CtlP->BusType = isISA; in sInitController()
2559 CtlP->MBaseIO = MudbacIO; in sInitController()
2560 CtlP->MReg1IO = MudbacIO + 1; in sInitController()
2561 CtlP->MReg2IO = MudbacIO + 2; in sInitController()
2562 CtlP->MReg3IO = MudbacIO + 3; in sInitController()
2564 CtlP->MReg2 = 0; /* interrupt disable */ in sInitController()
2565 CtlP->MReg3 = 0; /* no periodic interrupts */ in sInitController()
2568 CtlP->MReg2 = 0; /* interrupt disable */ in sInitController()
2569 CtlP->MReg3 = 0; /* no periodic interrupts */ in sInitController()
2571 CtlP->MReg2 = sIRQMap[IRQNum]; /* set IRQ number */ in sInitController()
2572 CtlP->MReg3 = Frequency; /* set frequency */ in sInitController()
2574 CtlP->MReg3 |= PERIODIC_ONLY; in sInitController()
2578 sOutB(CtlP->MReg2IO, CtlP->MReg2); in sInitController()
2579 sOutB(CtlP->MReg3IO, CtlP->MReg3); in sInitController()
2580 sControllerEOI(CtlP); /* clear EOI if warm init */ in sInitController()
2582 CtlP->NumAiop = 0; in sInitController()
2585 CtlP->AiopIO[i] = (WordIO_t) io; in sInitController()
2586 CtlP->AiopIntChanIO[i] = io + _INT_CHAN; in sInitController()
2587 sOutB(CtlP->MReg2IO, CtlP->MReg2 | (i & 0x03)); /* AIOP index */ in sInitController()
2591 sEnAiop(CtlP, i); /* enable the AIOP */ in sInitController()
2592 CtlP->AiopID[i] = sReadAiopID(io); /* read AIOP ID */ in sInitController()
2593 if (CtlP->AiopID[i] == AIOPID_NULL) /* if AIOP does not exist */ in sInitController()
2596 CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */ in sInitController()
2599 CtlP->NumAiop++; /* bump count of AIOPs */ in sInitController()
2601 sDisAiop(CtlP, i); /* disable AIOP */ in sInitController()
2604 if (CtlP->NumAiop == 0) in sInitController()
2607 return (CtlP->NumAiop); in sInitController()
2678 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum, in sInitChan() argument
2689 if (ChanNum >= CtlP->AiopNumChan[AiopNum]) in sInitChan()
2693 ChP->CtlP = CtlP; in sInitChan()
2694 ChP->ChanID = CtlP->AiopID[AiopNum]; in sInitChan()
2699 AiopIO = CtlP->AiopIO[AiopNum]; in sInitChan()
3057 sOutB(ChP->CtlP->AiopIO[2], (mode & 0x18) | ChP->ChanNum); in sSetInterfaceMode()
3064 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on) in sModemReset() argument
3069 addr = CtlP->AiopIO[0] + 0x400; in sModemReset()
3070 val = sInB(CtlP->MReg3IO); in sModemReset()
3073 val = sInB(CtlP->MReg2IO); in sModemReset()
3074 sOutB(CtlP->MReg2IO, (val & 0xfc) | (1 & 0x03)); in sModemReset()
3075 sOutB(CtlP->MBaseIO, (unsigned char) (addr >> 6)); in sModemReset()
3078 sEnAiop(CtlP, 1); in sModemReset()
3082 sDisAiop(CtlP, 1); in sModemReset()
3089 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on) in sPCIModemReset() argument
3093 addr = CtlP->AiopIO[0] + 0x40; /* 2nd AIOP */ in sPCIModemReset()