293 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
296 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_enable_must_enchance_mode()
309 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
312 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_disable_must_enchance_mode()
325 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xon1_value()
328 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_set_must_xon1_value()
342 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xoff1_value()
345 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_set_must_xoff1_value()
359 	oldlcr = inb(info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
362 	efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);  in mxser_set_must_fifo_value()
378 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_enum_value()
381 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_set_must_enum_value()
396 	oldlcr = inb(baseio + UART_LCR);  in mxser_get_must_hardware_id()
399 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_get_must_hardware_id()
404 	*pId = inb(baseio + MOXA_MUST_HWID_REGISTER);  in mxser_get_must_hardware_id()
414 	oldlcr = inb(baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
417 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
429 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
432 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_enable_must_tx_software_flow_control()
445 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
448 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_disable_must_tx_software_flow_control()
460 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
463 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_enable_must_rx_software_flow_control()
476 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
479 	efr = inb(baseio + MOXA_MUST_EFR_REGISTER);  in mxser_disable_must_rx_software_flow_control()
494 	oldmcr = inb(io + UART_MCR);  in CheckIsMoxaMust()
497 	if ((hwid = inb(io + UART_MCR)) != 0) {  in CheckIsMoxaMust()
536 	status = inb(baseaddr + UART_MSR);  in mxser_get_msr()
550 	return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;  in mxser_carrier_raised()
560 		outb(inb(mp->ioaddr + UART_MCR) |  in mxser_dtr_rts()
563 		outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),  in mxser_dtr_rts()
611 	cval = inb(info->ioaddr + UART_LCR);  in mxser_set_baud()
721 			status = inb(info->ioaddr + UART_MSR);  in mxser_change_speed()
896 	if (inb(info->ioaddr + UART_LSR) == 0xff) {  in mxser_activate()
908 	(void) inb(info->ioaddr + UART_LSR);  in mxser_activate()
909 	(void) inb(info->ioaddr + UART_RX);  in mxser_activate()
910 	(void) inb(info->ioaddr + UART_IIR);  in mxser_activate()
911 	(void) inb(info->ioaddr + UART_MSR);  in mxser_activate()
932 	(void) inb(info->ioaddr + UART_LSR);  in mxser_activate()
933 	(void) inb(info->ioaddr + UART_RX);  in mxser_activate()
934 	(void) inb(info->ioaddr + UART_IIR);  in mxser_activate()
935 	(void) inb(info->ioaddr + UART_MSR);  in mxser_activate()
986 	(void) inb(info->ioaddr + UART_RX);  in mxser_shutdown_port()
1027 	fcr = inb(info->ioaddr + UART_FCR);  in mxser_flush_buffer()
1059 	while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {  in mxser_close_port()
1315 	status = inb(info->ioaddr + UART_LSR);  in mxser_get_lsr_info()
1336 	status = inb(info->ioaddr + UART_MSR);  in mxser_tiocmget()
1384 	(void)inb(port);  in mxser_program_mode()
1385 	(void)inb(port);  in mxser_program_mode()
1387 	(void)inb(port);  in mxser_program_mode()
1389 	id = inb(port + 1) & 0x1F;  in mxser_program_mode()
1398 		n = inb(port + 2);  in mxser_program_mode()
1423 		n = inb(port + 5);  in mxser_normal_mode()
1427 			(void)inb(port);  in mxser_normal_mode()
1465 		(void)inb(port);  in mxser_read_register()
1470 			if (inb(port) & CHIP_DI)  in mxser_read_register()
1529 				status = inb(ip->ioaddr + UART_MSR);  in mxser_ioctl_special()
1618 					opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);  in mxser_ioctl_special()
1694 			val = inb(info->opmode_ioaddr);  in mxser_ioctl()
1702 			opmode = inb(info->opmode_ioaddr) >> shiftbit;  in mxser_ioctl()
1754 		lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;  in mxser_ioctl()
1767 		mcr = inb(info->ioaddr + UART_MCR);  in mxser_ioctl()
2011 	while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {  in mxser_wait_until_sent()
2045 		outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,  in mxser_rs_break()
2048 		outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,  in mxser_rs_break()
2076 		gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);  in mxser_receive_chars()
2085 			ch = inb(port->ioaddr + UART_RX);  in mxser_receive_chars()
2097 		ch = inb(port->ioaddr + UART_RX);  in mxser_receive_chars()
2138 		*status = inb(port->ioaddr + UART_LSR);  in mxser_receive_chars()
2231 		irqbits = inb(brd->vector) & brd->vector_mask;  in mxser_interrupt()
2246 				iir = inb(port->ioaddr + UART_IIR);  in mxser_interrupt()
2253 					status = inb(port->ioaddr + UART_LSR);  in mxser_interrupt()
2255 					inb(port->ioaddr + UART_MSR);  in mxser_interrupt()
2260 				status = inb(port->ioaddr + UART_LSR);  in mxser_interrupt()
2286 				msr = inb(port->ioaddr + UART_MSR);  in mxser_interrupt()
2407 		outb(inb(info->ioaddr + UART_IER) & 0xf0,  in mxser_initbrd()
2514 	scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);  in mxser_get_ISA_conf()
2519 	scratch = inb(cap + UART_IIR);  in mxser_get_ISA_conf()