293 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
294 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
300 	outb(oldlcr, baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
309 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
310 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
316 	outb(oldlcr, baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
325 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xon1_value()
326 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_set_must_xon1_value()
334 	outb(oldlcr, baseio + UART_LCR);  in mxser_set_must_xon1_value()
342 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xoff1_value()
343 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_set_must_xoff1_value()
351 	outb(oldlcr, baseio + UART_LCR);  in mxser_set_must_xoff1_value()
359 	oldlcr = inb(info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
360 	outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
370 	outb(oldlcr, info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
378 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_enum_value()
379 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_set_must_enum_value()
387 	outb(oldlcr, baseio + UART_LCR);  in mxser_set_must_enum_value()
396 	oldlcr = inb(baseio + UART_LCR);  in mxser_get_must_hardware_id()
397 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_get_must_hardware_id()
405 	outb(oldlcr, baseio + UART_LCR);  in mxser_get_must_hardware_id()
414 	oldlcr = inb(baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
415 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
421 	outb(oldlcr, baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
429 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
430 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
437 	outb(oldlcr, baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
445 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
446 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
452 	outb(oldlcr, baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
460 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
461 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
468 	outb(oldlcr, baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
476 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
477 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
483 	outb(oldlcr, baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
492 	outb(0, io + UART_LCR);  in CheckIsMoxaMust()
611 	cval = inb(info->ioaddr + UART_LCR);  in mxser_set_baud()
613 	outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR);	/* set DLAB */  in mxser_set_baud()
617 	outb(cval, info->ioaddr + UART_LCR);	/* reset DLAB */  in mxser_set_baud()
805 	outb(cval, info->ioaddr + UART_LCR);  in mxser_change_speed()
916 	outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR);	/* reset DLAB */  in mxser_activate()
2045 		outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,  in mxser_rs_break()
2046 			info->ioaddr + UART_LCR);  in mxser_rs_break()
2048 		outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,  in mxser_rs_break()
2049 			info->ioaddr + UART_LCR);  in mxser_rs_break()
2514 	scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);  in mxser_get_ISA_conf()
2515 	outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);  in mxser_get_ISA_conf()
2517 	outb(scratch2, cap + UART_LCR);  in mxser_get_ISA_conf()