297 	cy_writeb(port->u.cyy.base_addr + (reg << card->bus_index), val);  in cyy_writeb()
376 	cy_writeb(ccr, cmd);  in __cyy_issue_cmd()
400 	cy_writeb(address + (Cy_ClrIntr << index), 0);  in detect_isa_irq()
409 	cy_writeb(address + (CyCAR << index), 0);  in detect_isa_irq()
412 	cy_writeb(address + (CyCAR << index), 0);  in detect_isa_irq()
413 	cy_writeb(address + (CySRER << index),  in detect_isa_irq()
426 	cy_writeb(address + (CyCAR << index), (save_xir & 0x3));  in detect_isa_irq()
427 	cy_writeb(address + (CySRER << index),  in detect_isa_irq()
429 	cy_writeb(address + (CyTIR << index), (save_xir & 0x3f));  in detect_isa_irq()
430 	cy_writeb(address + (CyCAR << index), (save_car));  in detect_isa_irq()
431 	cy_writeb(address + (Cy_ClrIntr << index), 0);  in detect_isa_irq()
585 	cy_writeb(base_addr + (CyCAR << index), save_xir);  in cyy_chip_tx()
814 	cy_writeb(card_base_addr + (Cy_ClrIntr << index), 0);  in cyy_interrupt()
1039 		cy_writeb(cinfo->base_addr + tx_bufaddr + tx_put, data);  in cyz_handle_tx()
1070 		cy_writeb(cinfo->base_addr + tx_bufaddr + tx_put, data);  in cyz_handle_tx()
3155 	cy_writeb(true_base_addr + (Cy_HwReset << index), 0);  in cyy_init_card()
3157 	cy_writeb(true_base_addr + (Cy_ClrIntr << index), 0);  in cyy_init_card()
3174 		cy_writeb(base_addr + (CyGFRCR << index), 0);  in cyy_init_card()
3189 		cy_writeb(base_addr + (CyCCR << index), CyCHIP_RESET);  in cyy_init_card()
3210 		cy_writeb(base_addr + (CyGCR << index), CyCH0_SERIAL);  in cyy_init_card()
3215 			cy_writeb(base_addr + (CyPPR << index), CyCLOCK_60_2MS);  in cyy_init_card()
3218 			cy_writeb(base_addr + (CyPPR << index), CyCLOCK_25_5MS);  in cyy_init_card()
3549 		cy_writeb(tmp, 255);  in cyz_load_fw()
3554 			cy_writeb(tmp, 255);  in cyz_load_fw()
3845 			cy_writeb(addr0 + 0x4c, 0x43);  in cy_pci_probe()
3892 		cy_writeb(cinfo->ctl_addr.p9050 + 0x4c, 0);  in cy_pci_remove()
4096 			cy_writeb(card->base_addr + Cy_ClrIntr, 0);  in cy_cleanup_module()