Lines Matching refs:PCH_SPCR
31 #define PCH_SPCR 0x00 /* SPI control register */ macro
254 pch_spi_setclr_reg(master, PCH_SPCR, SPCR_MSTR_BIT, 0); in pch_spi_set_master_mode()
263 pch_spi_setclr_reg(master, PCH_SPCR, SPCR_FICLR_BIT, 0); in pch_spi_clear_fifo()
264 pch_spi_setclr_reg(master, PCH_SPCR, 0, SPCR_FICLR_BIT); in pch_spi_clear_fifo()
301 reg_spcr_val = ioread32(io_remap_addr + PCH_SPCR); in pch_spi_handler_sub()
308 iowrite32(reg_spcr_val, (io_remap_addr + PCH_SPCR)); in pch_spi_handler_sub()
319 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, in pch_spi_handler_sub()
440 pch_spi_setclr_reg(spi->master, PCH_SPCR, flags, in pch_spi_setup_transfer()
696 pch_spi_setclr_reg(data->master, PCH_SPCR, in pch_spi_set_ir()
703 pch_spi_setclr_reg(data->master, PCH_SPCR, in pch_spi_set_ir()
720 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL | SPCR_SPE_BIT); in pch_spi_set_ir()
784 pch_spi_setclr_reg(data->master, PCH_SPCR, SPCR_SPE_BIT, PCH_ALL); in pch_spi_start_transfer()
814 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, in pch_spi_start_transfer()
1002 pch_spi_setclr_reg(data->master, PCH_SPCR, in pch_spi_handle_dma()
1441 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL); in pch_spi_pd_remove()
1479 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL); in pch_spi_pd_suspend()