120 static inline u32 fsl_espi_read_reg(struct fsl_espi *espi, int offset)  in fsl_espi_read_reg()  argument
122 	return ioread32be(espi->reg_base + offset);  in fsl_espi_read_reg()
125 static inline u16 fsl_espi_read_reg16(struct fsl_espi *espi, int offset)  in fsl_espi_read_reg16()  argument
127 	return ioread16be(espi->reg_base + offset);  in fsl_espi_read_reg16()
130 static inline u8 fsl_espi_read_reg8(struct fsl_espi *espi, int offset)  in fsl_espi_read_reg8()  argument
132 	return ioread8(espi->reg_base + offset);  in fsl_espi_read_reg8()
135 static inline void fsl_espi_write_reg(struct fsl_espi *espi, int offset,  in fsl_espi_write_reg()  argument
138 	iowrite32be(val, espi->reg_base + offset);  in fsl_espi_write_reg()
141 static inline void fsl_espi_write_reg16(struct fsl_espi *espi, int offset,  in fsl_espi_write_reg16()  argument
144 	iowrite16be(val, espi->reg_base + offset);  in fsl_espi_write_reg16()
147 static inline void fsl_espi_write_reg8(struct fsl_espi *espi, int offset,  in fsl_espi_write_reg8()  argument
150 	iowrite8(val, espi->reg_base + offset);  in fsl_espi_write_reg8()
155 	struct fsl_espi *espi = spi_master_get_devdata(m->spi->master);  in fsl_espi_check_message()  local
159 		dev_err(espi->dev, "message too long, size is %u bytes\n",  in fsl_espi_check_message()
170 			dev_err(espi->dev, "bits_per_word/speed_hz should be the same for all transfers\n");  in fsl_espi_check_message()
178 		dev_err(espi->dev,  in fsl_espi_check_message()
218 static void fsl_espi_fill_tx_fifo(struct fsl_espi *espi, u32 events)  in fsl_espi_fill_tx_fifo()  argument
227 	tx_left = espi->tx_t->len - espi->tx_pos;  in fsl_espi_fill_tx_fifo()
228 	tx_buf = espi->tx_t->tx_buf;  in fsl_espi_fill_tx_fifo()
232 				fsl_espi_write_reg(espi, ESPI_SPITF, 0);  in fsl_espi_fill_tx_fifo()
233 			else if (espi->swab)  in fsl_espi_fill_tx_fifo()
234 				fsl_espi_write_reg(espi, ESPI_SPITF,  in fsl_espi_fill_tx_fifo()
235 					swahb32p(tx_buf + espi->tx_pos));  in fsl_espi_fill_tx_fifo()
237 				fsl_espi_write_reg(espi, ESPI_SPITF,  in fsl_espi_fill_tx_fifo()
238 					*(u32 *)(tx_buf + espi->tx_pos));  in fsl_espi_fill_tx_fifo()
239 			espi->tx_pos += 4;  in fsl_espi_fill_tx_fifo()
242 		} else if (tx_left >= 2 && tx_buf && espi->swab) {  in fsl_espi_fill_tx_fifo()
243 			fsl_espi_write_reg16(espi, ESPI_SPITF,  in fsl_espi_fill_tx_fifo()
244 					swab16p(tx_buf + espi->tx_pos));  in fsl_espi_fill_tx_fifo()
245 			espi->tx_pos += 2;  in fsl_espi_fill_tx_fifo()
250 				fsl_espi_write_reg8(espi, ESPI_SPITF, 0);  in fsl_espi_fill_tx_fifo()
252 				fsl_espi_write_reg8(espi, ESPI_SPITF,  in fsl_espi_fill_tx_fifo()
253 					*(u8 *)(tx_buf + espi->tx_pos));  in fsl_espi_fill_tx_fifo()
254 			espi->tx_pos += 1;  in fsl_espi_fill_tx_fifo()
262 		if (list_is_last(&espi->tx_t->transfer_list,  in fsl_espi_fill_tx_fifo()
263 		    espi->m_transfers) || espi->rxskip) {  in fsl_espi_fill_tx_fifo()
264 			espi->tx_done = true;  in fsl_espi_fill_tx_fifo()
267 		espi->tx_t = list_next_entry(espi->tx_t, transfer_list);  in fsl_espi_fill_tx_fifo()
268 		espi->tx_pos = 0;  in fsl_espi_fill_tx_fifo()
275 static void fsl_espi_read_rx_fifo(struct fsl_espi *espi, u32 events)  in fsl_espi_read_rx_fifo()  argument
282 	rx_left = espi->rx_t->len - espi->rx_pos;  in fsl_espi_read_rx_fifo()
283 	rx_buf = espi->rx_t->rx_buf;  in fsl_espi_read_rx_fifo()
286 			u32 val = fsl_espi_read_reg(espi, ESPI_SPIRF);  in fsl_espi_read_rx_fifo()
288 			if (rx_buf && espi->swab)  in fsl_espi_read_rx_fifo()
289 				*(u32 *)(rx_buf + espi->rx_pos) = swahb32(val);  in fsl_espi_read_rx_fifo()
291 				*(u32 *)(rx_buf + espi->rx_pos) = val;  in fsl_espi_read_rx_fifo()
292 			espi->rx_pos += 4;  in fsl_espi_read_rx_fifo()
295 		} else if (rx_left >= 2 && rx_buf && espi->swab) {  in fsl_espi_read_rx_fifo()
296 			u16 val = fsl_espi_read_reg16(espi, ESPI_SPIRF);  in fsl_espi_read_rx_fifo()
298 			*(u16 *)(rx_buf + espi->rx_pos) = swab16(val);  in fsl_espi_read_rx_fifo()
299 			espi->rx_pos += 2;  in fsl_espi_read_rx_fifo()
303 			u8 val = fsl_espi_read_reg8(espi, ESPI_SPIRF);  in fsl_espi_read_rx_fifo()
306 				*(u8 *)(rx_buf + espi->rx_pos) = val;  in fsl_espi_read_rx_fifo()
307 			espi->rx_pos += 1;  in fsl_espi_read_rx_fifo()
314 		if (list_is_last(&espi->rx_t->transfer_list,  in fsl_espi_read_rx_fifo()
315 		    espi->m_transfers)) {  in fsl_espi_read_rx_fifo()
316 			espi->rx_done = true;  in fsl_espi_read_rx_fifo()
319 		espi->rx_t = list_next_entry(espi->rx_t, transfer_list);  in fsl_espi_read_rx_fifo()
320 		espi->rx_pos = 0;  in fsl_espi_read_rx_fifo()
330 	struct fsl_espi *espi = spi_master_get_devdata(spi->master);  in fsl_espi_setup_transfer()  local
341 	pm = DIV_ROUND_UP(espi->spibrg, hz * 4) - 1;  in fsl_espi_setup_transfer()
345 		pm = DIV_ROUND_UP(espi->spibrg, hz * 16 * 4) - 1;  in fsl_espi_setup_transfer()
352 		fsl_espi_write_reg(espi, ESPI_SPMODEx(spi->chip_select),  in fsl_espi_setup_transfer()
358 	struct fsl_espi *espi = spi_master_get_devdata(spi->master);  in fsl_espi_bufs()  local
363 	reinit_completion(&espi->done);  in fsl_espi_bufs()
370 	if (espi->rxskip) {  in fsl_espi_bufs()
371 		spcom |= SPCOM_RXSKIP(espi->rxskip);  in fsl_espi_bufs()
372 		rx_len = t->len - espi->rxskip;  in fsl_espi_bufs()
377 	fsl_espi_write_reg(espi, ESPI_SPCOM, spcom);  in fsl_espi_bufs()
383 	fsl_espi_write_reg(espi, ESPI_SPIM, mask);  in fsl_espi_bufs()
386 	spin_lock_irq(&espi->lock);  in fsl_espi_bufs()
387 	fsl_espi_fill_tx_fifo(espi, 0);  in fsl_espi_bufs()
388 	spin_unlock_irq(&espi->lock);  in fsl_espi_bufs()
391 	ret = wait_for_completion_timeout(&espi->done, 2 * HZ);  in fsl_espi_bufs()
393 		dev_err(espi->dev, "Transfer timed out!\n");  in fsl_espi_bufs()
396 	fsl_espi_write_reg(espi, ESPI_SPIM, 0);  in fsl_espi_bufs()
403 	struct fsl_espi *espi = spi_master_get_devdata(m->spi->master);  in fsl_espi_trans()  local
408 	espi->swab = spi->mode & SPI_LSB_FIRST && trans->bits_per_word > 8;  in fsl_espi_trans()
410 	espi->m_transfers = &m->transfers;  in fsl_espi_trans()
411 	espi->tx_t = list_first_entry(&m->transfers, struct spi_transfer,  in fsl_espi_trans()
413 	espi->tx_pos = 0;  in fsl_espi_trans()
414 	espi->tx_done = false;  in fsl_espi_trans()
415 	espi->rx_t = list_first_entry(&m->transfers, struct spi_transfer,  in fsl_espi_trans()
417 	espi->rx_pos = 0;  in fsl_espi_trans()
418 	espi->rx_done = false;  in fsl_espi_trans()
420 	espi->rxskip = fsl_espi_check_rxskip_mode(m);  in fsl_espi_trans()
421 	if (trans->rx_nbits == SPI_NBITS_DUAL && !espi->rxskip) {  in fsl_espi_trans()
422 		dev_err(espi->dev, "Dual output mode requires RXSKIP mode!\n");  in fsl_espi_trans()
427 	if (espi->rxskip)  in fsl_espi_trans()
428 		espi->rx_t = list_next_entry(espi->rx_t, transfer_list);  in fsl_espi_trans()
482 	struct fsl_espi *espi;  in fsl_espi_setup()  local
493 	espi = spi_master_get_devdata(spi->master);  in fsl_espi_setup()
495 	pm_runtime_get_sync(espi->dev);  in fsl_espi_setup()
497 	cs->hw_mode = fsl_espi_read_reg(espi, ESPI_SPMODEx(spi->chip_select));  in fsl_espi_setup()
510 	loop_mode = fsl_espi_read_reg(espi, ESPI_SPMODE);  in fsl_espi_setup()
514 	fsl_espi_write_reg(espi, ESPI_SPMODE, loop_mode);  in fsl_espi_setup()
518 	pm_runtime_mark_last_busy(espi->dev);  in fsl_espi_setup()
519 	pm_runtime_put_autosuspend(espi->dev);  in fsl_espi_setup()
532 static void fsl_espi_cpu_irq(struct fsl_espi *espi, u32 events)  in fsl_espi_cpu_irq()  argument
534 	if (!espi->rx_done)  in fsl_espi_cpu_irq()
535 		fsl_espi_read_rx_fifo(espi, events);  in fsl_espi_cpu_irq()
537 	if (!espi->tx_done)  in fsl_espi_cpu_irq()
538 		fsl_espi_fill_tx_fifo(espi, events);  in fsl_espi_cpu_irq()
540 	if (!espi->tx_done || !espi->rx_done)  in fsl_espi_cpu_irq()
544 	events = fsl_espi_read_reg(espi, ESPI_SPIE);  in fsl_espi_cpu_irq()
547 		dev_err(espi->dev,  in fsl_espi_cpu_irq()
551 		dev_err(espi->dev, "Transfer done but rx/tx fifo's aren't empty!\n");  in fsl_espi_cpu_irq()
552 		dev_err(espi->dev, "SPIE_RXCNT = %d, SPIE_TXCNT = %d\n",  in fsl_espi_cpu_irq()
556 	complete(&espi->done);  in fsl_espi_cpu_irq()
561 	struct fsl_espi *espi = context_data;  in fsl_espi_irq()  local
564 	spin_lock(&espi->lock);  in fsl_espi_irq()
567 	events = fsl_espi_read_reg(espi, ESPI_SPIE);  in fsl_espi_irq()
569 		spin_unlock(&espi->lock);  in fsl_espi_irq()
573 	dev_vdbg(espi->dev, "%s: events %x\n", __func__, events);  in fsl_espi_irq()
575 	fsl_espi_cpu_irq(espi, events);  in fsl_espi_irq()
578 	fsl_espi_write_reg(espi, ESPI_SPIE, events);  in fsl_espi_irq()
580 	spin_unlock(&espi->lock);  in fsl_espi_irq()
589 	struct fsl_espi *espi = spi_master_get_devdata(master);  in fsl_espi_runtime_suspend()  local
592 	regval = fsl_espi_read_reg(espi, ESPI_SPMODE);  in fsl_espi_runtime_suspend()
594 	fsl_espi_write_reg(espi, ESPI_SPMODE, regval);  in fsl_espi_runtime_suspend()
602 	struct fsl_espi *espi = spi_master_get_devdata(master);  in fsl_espi_runtime_resume()  local
605 	regval = fsl_espi_read_reg(espi, ESPI_SPMODE);  in fsl_espi_runtime_resume()
607 	fsl_espi_write_reg(espi, ESPI_SPMODE, regval);  in fsl_espi_runtime_resume()
621 	struct fsl_espi *espi = spi_master_get_devdata(master);  in fsl_espi_init_regs()  local
627 	fsl_espi_write_reg(espi, ESPI_SPMODE, 0);  in fsl_espi_init_regs()
628 	fsl_espi_write_reg(espi, ESPI_SPIM, 0);  in fsl_espi_init_regs()
629 	fsl_espi_write_reg(espi, ESPI_SPCOM, 0);  in fsl_espi_init_regs()
630 	fsl_espi_write_reg(espi, ESPI_SPIE, 0xffffffff);  in fsl_espi_init_regs()
655 		fsl_espi_write_reg(espi, ESPI_SPMODEx(cs), csmode);  in fsl_espi_init_regs()
662 	fsl_espi_write_reg(espi, ESPI_SPMODE, SPMODE_INIT_VAL | SPMODE_ENABLE);  in fsl_espi_init_regs()
669 	struct fsl_espi *espi;  in fsl_espi_probe()  local
689 	espi = spi_master_get_devdata(master);  in fsl_espi_probe()
690 	spin_lock_init(&espi->lock);  in fsl_espi_probe()
692 	espi->dev = dev;  in fsl_espi_probe()
693 	espi->spibrg = fsl_get_sys_freq();  in fsl_espi_probe()
694 	if (espi->spibrg == -1) {  in fsl_espi_probe()
700 	master->min_speed_hz = DIV_ROUND_UP(espi->spibrg, 4 * 16 * 16);  in fsl_espi_probe()
701 	master->max_speed_hz = DIV_ROUND_UP(espi->spibrg, 4);  in fsl_espi_probe()
703 	init_completion(&espi->done);  in fsl_espi_probe()
705 	espi->reg_base = devm_ioremap_resource(dev, mem);  in fsl_espi_probe()
706 	if (IS_ERR(espi->reg_base)) {  in fsl_espi_probe()
707 		ret = PTR_ERR(espi->reg_base);  in fsl_espi_probe()
712 	ret = devm_request_irq(dev, irq, fsl_espi_irq, 0, "fsl_espi", espi);  in fsl_espi_probe()
728 	dev_info(dev, "at 0x%p (irq = %u)\n", espi->reg_base, irq);  in fsl_espi_probe()