72 	unsigned short csr; /* control/status reg */  member
195 	unsigned short csr = dregs->csr;  in scsi_sun3_intr()  local
199 	dregs->csr &= ~CSR_DMA_ENABLE;  in scsi_sun3_intr()
202 	if(csr & ~CSR_GOOD) {  in scsi_sun3_intr()
203 		if (csr & CSR_DMA_BUSERR)  in scsi_sun3_intr()
205 		if (csr & CSR_DMA_CONFLICT)  in scsi_sun3_intr()
210 	if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {  in scsi_sun3_intr()
241 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_setup()
242 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_setup()
247 		dregs->csr |= CSR_SEND;  in sun3scsi_dma_setup()
249 		dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_setup()
252 	dregs->csr |= CSR_PACK_ENABLE;  in sun3scsi_dma_setup()
268 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_setup()
269 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_setup()
347 	unsigned short csr;  in sun3scsi_dma_start()  local
349 	csr = dregs->csr;  in sun3scsi_dma_start()
377 	dregs->csr &= ~CSR_DMA_ENABLE;  in sun3scsi_dma_finish()
387 	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {  in sun3scsi_dma_finish()
395 		switch (dregs->csr & CSR_LEFT) {  in sun3scsi_dma_finish()
415 			if(dregs->csr & CSR_FIFO_EMPTY)  in sun3scsi_dma_finish()
461 	dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_finish()
466 	dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_finish()
469 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_finish()
470 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_finish()
545 			oldcsr = dregs->csr;  in sun3_scsi_probe()
546 			dregs->csr = 0;  in sun3_scsi_probe()
548 			if (dregs->csr == 0x1400)  in sun3_scsi_probe()
551 			dregs->csr = oldcsr;  in sun3_scsi_probe()
601 	dregs->csr = 0;  in sun3_scsi_probe()
603 	dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;  in sun3_scsi_probe()