Lines Matching refs:qla27xx_write_reg
190 qla27xx_write_reg(__iomem struct device_reg_24xx *reg, in qla27xx_write_reg() function
208 qla27xx_write_reg(reg, IOBASE_ADDR, addr, buf); in qla27xx_read_window()
269 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t257.base_addr, buf); in qla27xx_fwdt_entry_t257()
270 qla27xx_write_reg(reg, ent->t257.pci_offset, ent->t257.write_data, buf); in qla27xx_fwdt_entry_t257()
283 qla27xx_write_reg(reg, ent->t258.banksel_offset, ent->t258.bank, buf); in qla27xx_fwdt_entry_t258()
298 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t259.base_addr, buf); in qla27xx_fwdt_entry_t259()
299 qla27xx_write_reg(reg, ent->t259.banksel_offset, ent->t259.bank, buf); in qla27xx_fwdt_entry_t259()
300 qla27xx_write_reg(reg, ent->t259.pci_offset, ent->t259.write_data, buf); in qla27xx_fwdt_entry_t259()
327 qla27xx_write_reg(reg, ent->t261.pci_offset, ent->t261.write_data, buf); in qla27xx_fwdt_entry_t261()
518 qla27xx_write_reg(reg, ent->t267.pci_offset, ent->t267.data, buf); in qla27xx_fwdt_entry_t267()
620 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf); in qla27xx_fwdt_entry_t270()
622 qla27xx_write_reg(reg, 0xc0, addr|0x80000000, buf); in qla27xx_fwdt_entry_t270()
641 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf); in qla27xx_fwdt_entry_t271()
642 qla27xx_write_reg(reg, 0xc4, data, buf); in qla27xx_fwdt_entry_t271()
643 qla27xx_write_reg(reg, 0xc0, addr, buf); in qla27xx_fwdt_entry_t271()