1173 	WRT_REG_DWORD(&reg->ctrl_status,  in qla24xx_unprotect_flash()
1174 	    RD_REG_DWORD(&reg->ctrl_status) | CSRX_FLASH_ENABLE);  in qla24xx_unprotect_flash()
1175 	RD_REG_DWORD(&reg->ctrl_status);	/* PCI Posting. */  in qla24xx_unprotect_flash()
1212 	WRT_REG_DWORD(&reg->ctrl_status,  in qla24xx_protect_flash()
1213 	    RD_REG_DWORD(&reg->ctrl_status) & ~CSRX_FLASH_ENABLE);  in qla24xx_protect_flash()
1214 	RD_REG_DWORD(&reg->ctrl_status);	/* PCI Posting. */  in qla24xx_protect_flash()
1440 	WRT_REG_DWORD(&reg->ctrl_status,  in qla24xx_write_nvram_data()
1441 	    RD_REG_DWORD(&reg->ctrl_status) | CSRX_FLASH_ENABLE);  in qla24xx_write_nvram_data()
1442 	RD_REG_DWORD(&reg->ctrl_status);	/* PCI Posting. */  in qla24xx_write_nvram_data()
1465 	WRT_REG_DWORD(&reg->ctrl_status,  in qla24xx_write_nvram_data()
1466 	    RD_REG_DWORD(&reg->ctrl_status) & ~CSRX_FLASH_ENABLE);  in qla24xx_write_nvram_data()
1467 	RD_REG_DWORD(&reg->ctrl_status);	/* PCI Posting. */  in qla24xx_write_nvram_data()
1941 	data = RD_REG_WORD(&reg->ctrl_status);  in qla2x00_flash_enable()
1943 	WRT_REG_WORD(&reg->ctrl_status, data);  in qla2x00_flash_enable()
1944 	RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_flash_enable()
1957 	data = RD_REG_WORD(&reg->ctrl_status);  in qla2x00_flash_disable()
1959 	WRT_REG_WORD(&reg->ctrl_status, data);  in qla2x00_flash_disable()
1960 	RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_flash_disable()
1979 	bank_select = RD_REG_WORD(&reg->ctrl_status);  in qla2x00_read_flash_byte()
1987 		WRT_REG_WORD(&reg->ctrl_status, bank_select);  in qla2x00_read_flash_byte()
1988 		RD_REG_WORD(&reg->ctrl_status);	/* PCI Posting. */  in qla2x00_read_flash_byte()
1999 		WRT_REG_WORD(&reg->ctrl_status, bank_select);  in qla2x00_read_flash_byte()
2000 		RD_REG_WORD(&reg->ctrl_status);	/* PCI Posting. */  in qla2x00_read_flash_byte()
2004 		WRT_REG_WORD(&reg->ctrl_status, bank_select);  in qla2x00_read_flash_byte()
2005 		RD_REG_WORD(&reg->ctrl_status);	/* PCI Posting. */  in qla2x00_read_flash_byte()
2039 	bank_select = RD_REG_WORD(&reg->ctrl_status);  in qla2x00_write_flash_byte()
2046 		WRT_REG_WORD(&reg->ctrl_status, bank_select);  in qla2x00_write_flash_byte()
2047 		RD_REG_WORD(&reg->ctrl_status);	/* PCI Posting. */  in qla2x00_write_flash_byte()
2050 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_write_flash_byte()
2052 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_write_flash_byte()
2060 		WRT_REG_WORD(&reg->ctrl_status, bank_select);  in qla2x00_write_flash_byte()
2061 		RD_REG_WORD(&reg->ctrl_status);	/* PCI Posting. */  in qla2x00_write_flash_byte()
2065 		WRT_REG_WORD(&reg->ctrl_status, bank_select);  in qla2x00_write_flash_byte()
2066 		RD_REG_WORD(&reg->ctrl_status);	/* PCI Posting. */  in qla2x00_write_flash_byte()
2075 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_write_flash_byte()
2077 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_write_flash_byte()
2370 	WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_write_optrom_data()