2279 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);  in qla2100_pci_config()
2330 		WRT_REG_WORD(&reg->ctrl_status, 0x20);  in qla2300_pci_config()
2331 		RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2340 		WRT_REG_WORD(&reg->ctrl_status, 0x0);  in qla2300_pci_config()
2341 		RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2361 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2405 	ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);  in qla24xx_pci_config()
2522 		WRT_REG_WORD(&reg->ctrl_status, 0x20);  in qla2x00_reset_chip()
2523 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2536 		WRT_REG_WORD(&reg->ctrl_status, 0x10);  in qla2x00_reset_chip()
2537 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2555 		WRT_REG_WORD(&reg->ctrl_status, 0);  in qla2x00_reset_chip()
2556 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2571 	WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_reset_chip()
2582 			if ((RD_REG_WORD(&reg->ctrl_status) &  in qla2x00_reset_chip()
2659 	WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);  in qla24xx_reset_risc()
2661 		if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)  in qla24xx_reset_risc()
2667 	if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))  in qla24xx_reset_risc()
2673 	    RD_REG_DWORD(&reg->ctrl_status),  in qla24xx_reset_risc()
2674 	    (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));  in qla24xx_reset_risc()
2676 	WRT_REG_DWORD(&reg->ctrl_status,  in qla24xx_reset_risc()
2702 	RD_REG_DWORD(&reg->ctrl_status);  in qla24xx_reset_risc()
2705 		if ((RD_REG_DWORD(&reg->ctrl_status) &  in qla24xx_reset_risc()
2711 	if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))  in qla24xx_reset_risc()
2717 	    RD_REG_DWORD(&reg->ctrl_status));  in qla24xx_reset_risc()
2905 	WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_chip_diag()
2912 	data = qla2x00_debounce_register(&reg->ctrl_status);  in qla2x00_chip_diag()
2915 		data = RD_REG_WORD(&reg->ctrl_status);  in qla2x00_chip_diag()
4377 		if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)  in qla2x00_nvram_config()