2279 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);  in qla2100_pci_config()
2323 			if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)  in qla2300_pci_config()
2331 		RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2341 		RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2346 			if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)  in qla2300_pci_config()
2361 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2511 				if ((RD_REG_WORD(&reg->hccr) &  in qla2x00_reset_chip()
2517 			RD_REG_WORD(&reg->hccr);	/* PCI Posting. */  in qla2x00_reset_chip()
2523 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2527 		RD_REG_WORD(&reg->fpm_diag_config);	/* PCI Posting. */  in qla2x00_reset_chip()
2532 			RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */  in qla2x00_reset_chip()
2537 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2556 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2560 		RD_REG_WORD(&reg->hccr);		/* PCI Posting. */  in qla2x00_reset_chip()
2564 		RD_REG_WORD(&reg->hccr);		/* PCI Posting. */  in qla2x00_reset_chip()
2582 			if ((RD_REG_WORD(&reg->ctrl_status) &  in qla2x00_reset_chip()
2597 	RD_REG_WORD(&reg->hccr);			/* PCI Posting. */  in qla2x00_reset_chip()
2616 		RD_REG_WORD(&reg->hccr);		/* PCI Posting. */  in qla2x00_reset_chip()
2683 	RD_REG_WORD(&reg->mailbox0);  in qla24xx_reset_risc()
2684 	for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&  in qla24xx_reset_risc()
2745 	RD_REG_WORD(&reg->mailbox0);  in qla24xx_reset_risc()
2746 	for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&  in qla24xx_reset_risc()
2760 	     RD_REG_WORD(&reg->mailbox0));  in qla24xx_reset_risc()
2915 		data = RD_REG_WORD(&reg->ctrl_status);  in qla2x00_chip_diag()
3501 		RD_REG_WORD(&reg->hccr);  in qla2x00_setup_chip()
3593 		RD_REG_WORD(&reg->hccr);  in qla2x00_setup_chip()
3835 	RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg));		/* PCI Posting. */  in qla2x00_config_rings()
4377 		if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)  in qla2x00_nvram_config()
6850 	RD_REG_WORD(&reg->hccr);			/* PCI Posting. */  in qla2x00_reset_adapter()
6852 	RD_REG_WORD(&reg->hccr);			/* PCI Posting. */  in qla2x00_reset_adapter()