Lines Matching defs:qla_hw_data
3555 struct qla_hw_data { struct
3556 struct pci_dev *pdev;
3559 mempool_t *srb_mempool;
3561 volatile struct {
3612 } flags;
3614 uint16_t max_exchg;
3615 uint16_t long_range_distance; /* 32G & above */
3626 spinlock_t hardware_lock ____cacheline_aligned;
3627 int bars;
3628 int mem_only;
3629 device_reg_t *iobase; /* Base I/O address */
3630 resource_size_t pio_address;
3633 dma_addr_t bar0_hdl;
3635 void __iomem *cregbase;
3636 dma_addr_t bar2_hdl;
3640 uint32_t rqstq_intr_code;
3641 uint32_t mbx_intr_code;
3642 uint32_t req_que_len;
3643 uint32_t rsp_que_len;
3644 uint32_t req_que_off;
3645 uint32_t rsp_que_off;
3648 device_reg_t *mqiobase;
3649 device_reg_t *msixbase;
3650 uint16_t msix_count;
3651 uint8_t mqenable;
3652 struct req_que **req_q_map;
3653 struct rsp_que **rsp_q_map;
3654 struct qla_qpair **queue_pair_map;
3655 unsigned long req_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)];
3656 unsigned long rsp_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)];
3657 unsigned long qpair_qid_map[(QLA_MAX_QUEUES / 8)
3659 uint8_t max_req_queues;
3660 uint8_t max_rsp_queues;
3661 uint8_t max_qpairs;
3662 uint8_t num_qpairs;
3663 struct qla_qpair *base_qpair;
3664 struct qla_npiv_entry *npiv_info;
3665 uint16_t nvram_npiv_size;
3667 uint16_t switch_cap;
3673 uint8_t port_no; /* Physical port of adapter */
3674 uint8_t exch_starvation;
3677 uint8_t loop_down_abort_time; /* port down timer */
3678 atomic_t loop_down_timer; /* loop down timer */
3679 uint8_t link_down_timeout; /* link down timeout */
3680 uint16_t max_loop_id;
3681 uint16_t max_fibre_devices; /* Maximum number of targets */
3683 uint16_t fb_rev;
3684 uint16_t min_external_loopid; /* First external loop Id */
3694 uint16_t link_data_rate; /* F/W operating speed */
3696 uint8_t current_topology;
3697 uint8_t prev_topology;
3703 uint8_t operating_mode; /* F/W operating mode */
3708 uint8_t interrupts_on;
3709 uint32_t isp_abort_cnt;
3719 uint32_t isp_type;
3744 uint32_t device_type;
3836 uint8_t serial0;
3837 uint8_t serial1;
3838 uint8_t serial2;
3843 uint16_t nvram_size;
3844 uint16_t nvram_base;
3845 void *nvram;
3846 uint16_t vpd_size;
3847 uint16_t vpd_base;
3848 void *vpd;
3850 uint16_t loop_reset_delay;
3851 uint8_t retry_count;
3852 uint8_t login_timeout;
3853 uint16_t r_a_tov;
3854 int port_down_retry_count;
3855 uint8_t mbx_count;
3856 uint8_t aen_mbx_count;
3857 atomic_t num_pend_mbx_stage1;
3858 atomic_t num_pend_mbx_stage2;
3859 atomic_t num_pend_mbx_stage3;
3860 uint16_t frame_payload_size;
3862 uint32_t login_retry_count;
3864 ms_iocb_entry_t *ms_iocb;
3865 dma_addr_t ms_iocb_dma;
3866 struct ct_sns_pkt *ct_sns;
3867 dma_addr_t ct_sns_dma;
3869 struct sns_cmd_pkt *sns_cmd;
3870 dma_addr_t sns_cmd_dma;
3874 void *sfp_data;
3875 dma_addr_t sfp_data_dma;
3878 void *xgmac_data;
3879 dma_addr_t xgmac_data_dma;
3882 void *dcbx_tlv;
3883 dma_addr_t dcbx_tlv_dma;
3885 struct task_struct *dpc_thread;
3886 uint8_t dpc_active; /* DPC routine is active */
3888 dma_addr_t gid_list_dma;
3889 struct gid_list_info *gid_list;
3890 int gid_list_info_size;
3894 struct dma_pool *s_dma_pool;
3896 dma_addr_t init_cb_dma;
3897 init_cb_t *init_cb;
3898 int init_cb_size;
3899 dma_addr_t ex_init_cb_dma;
3900 struct ex_init_cb_81xx *ex_init_cb;
3902 void *async_pd;
3903 dma_addr_t async_pd_dma;
3908 void *exlogin_buf;
3909 dma_addr_t exlogin_buf_dma;
3910 int exlogin_size;
3915 void *exchoffld_buf;
3916 dma_addr_t exchoffld_buf_dma;
3917 int exchoffld_size;
3918 int exchoffld_count;
3921 struct els_plogi_payload plogi_els_payld;
3923 void *swl;
3926 uint16_t mailbox_out[MAILBOX_REGISTER_COUNT];
3927 uint32_t mailbox_out32[MAILBOX_REGISTER_COUNT];
3928 uint32_t aenmb[AEN_MAILBOX_REGISTER_COUNT_FX00];
3930 mbx_cmd_t *mcp;
3931 struct mbx_cmd_32 *mcp32;
3933 unsigned long mbx_cmd_flags;
3938 struct mutex vport_lock; /* Virtual port synchronization */
3939 spinlock_t vport_slock; /* order is hardware_lock, then vport_slock */
3940 struct mutex mq_lock; /* multi-queue synchronization */
3941 struct completion mbx_cmd_comp; /* Serialize mbx access */
3942 struct completion mbx_intr_comp; /* Used for completion notification */
3943 struct completion dcbx_comp; /* For set port config notification */
3944 struct completion lb_portup_comp; /* Used to wait for link up during
3949 int notify_dcbx_comp;
3950 int notify_lb_portup_comp;
3951 struct mutex selflogin_lock;
3954 uint16_t fw_major_version;
3955 uint16_t fw_minor_version;
3956 uint16_t fw_subminor_version;
3957 uint16_t fw_attributes;
3958 uint16_t fw_attributes_h;
3959 uint16_t fw_attributes_ext[2];
3960 uint32_t fw_memory_size;
3961 uint32_t fw_transfer_size;
3962 uint32_t fw_srisc_address;
3967 uint16_t orig_fw_tgt_xcb_count;
3968 uint16_t cur_fw_tgt_xcb_count;
3969 uint16_t orig_fw_xcb_count;
3970 uint16_t cur_fw_xcb_count;
3971 uint16_t orig_fw_iocb_count;
3972 uint16_t cur_fw_iocb_count;
3973 uint16_t fw_max_fcf_count;
3975 uint32_t fw_shared_ram_start;
3976 uint32_t fw_shared_ram_end;
3977 uint32_t fw_ddr_ram_start;
3978 uint32_t fw_ddr_ram_end;
3980 uint16_t fw_options[16]; /* slots: 1,2,3,10,11 */
3981 uint8_t fw_seriallink_options[4];
3982 uint16_t fw_seriallink_options24[4];
3984 uint8_t mpi_version[3];
3985 uint32_t mpi_capabilities;
3986 uint8_t phy_version[3];
3987 uint8_t pep_version[3];
3990 void *fw_dump_template;
3991 uint32_t fw_dump_template_len;
3993 struct qla2xxx_fw_dump *fw_dump;
3994 uint32_t fw_dump_len;
3995 int fw_dumped;
3996 unsigned long fw_dump_cap_flags;
4005 int fw_dump_reading;
4006 int prev_minidump_failed;
4007 dma_addr_t eft_dma;
4008 void *eft;
4011 dma_addr_t mctp_dump_dma;
4012 void *mctp_dump;
4013 int mctp_dumped;
4014 int mctp_dump_reading;
4015 uint32_t chain_offset;
4016 struct dentry *dfs_dir;
4017 struct dentry *dfs_fce;
4018 struct dentry *dfs_tgt_counters;
4019 struct dentry *dfs_fw_resource_cnt;
4021 dma_addr_t fce_dma;
4022 void *fce;
4023 uint32_t fce_bufs;
4024 uint16_t fce_mb[8];
4025 uint64_t fce_wr, fce_rd;
4026 struct mutex fce_mutex;
4028 uint32_t pci_attr;
4029 uint16_t chip_revision;
4031 uint16_t product_id[4];
4033 uint8_t model_number[16+1];
4035 char model_desc[80];
4036 uint8_t adapter_id[16+1];
4039 char *optrom_buffer;
4040 uint32_t optrom_size;
4041 int optrom_state;
4045 uint32_t optrom_region_start;
4046 uint32_t optrom_region_size;
4047 struct mutex optrom_mutex;
4053 uint8_t bios_revision[2];
4054 uint8_t efi_revision[2];
4055 uint8_t fcode_revision[16];
4056 uint32_t fw_revision[4];
4058 uint32_t gold_fw_version[4];
4061 uint32_t flash_conf_off;
4062 uint32_t flash_data_off;
4063 uint32_t nvram_conf_off;
4064 uint32_t nvram_data_off;
4066 uint32_t fdt_wrt_disable;
4067 uint32_t fdt_wrt_enable;
4068 uint32_t fdt_erase_cmd;
4069 uint32_t fdt_block_size;
4070 uint32_t fdt_unprotect_sec_cmd;
4071 uint32_t fdt_protect_sec_cmd;
4072 uint32_t fdt_wrt_sts_reg_cmd;
4074 uint32_t flt_region_flt;
4075 uint32_t flt_region_fdt;
4076 uint32_t flt_region_boot;
4077 uint32_t flt_region_boot_sec;
4078 uint32_t flt_region_fw;
4079 uint32_t flt_region_fw_sec;
4080 uint32_t flt_region_vpd_nvram;
4081 uint32_t flt_region_vpd;
4082 uint32_t flt_region_vpd_sec;
4083 uint32_t flt_region_nvram;
4084 uint32_t flt_region_npiv_conf;
4085 uint32_t flt_region_gold_fw;
4086 uint32_t flt_region_fcp_prio;
4087 uint32_t flt_region_bootload;
4088 uint32_t flt_region_img_status_pri;
4089 uint32_t flt_region_img_status_sec;
4090 uint8_t active_image;
4093 uint16_t beacon_blink_led;
4094 uint8_t beacon_color_state;
4100 uint16_t zio_mode;
4101 uint16_t zio_timer;
4103 struct qla_msix_entry *msix_entries;
4105 struct list_head vp_list; /* list of VP */
4106 unsigned long vp_idx_map[(MAX_MULTI_ID_FABRIC / 8) /
4108 uint16_t num_vhosts; /* number of vports created */
4109 uint16_t num_vsans; /* number of vsan created */
4110 uint16_t max_npiv_vports; /* 63 or 125 per topoloty */
4111 int cur_vport_count;
4113 struct qla_chip_state_84xx *cs84xx;
4114 struct isp_operations *isp_ops;
4115 struct workqueue_struct *wq;
4116 struct qlfc_fw fw_buf;
4119 struct qla_fcp_prio_cfg *fcp_prio_cfg;
4121 struct dma_pool *dl_dma_pool;
4124 struct dma_pool *fcp_cmnd_dma_pool;
4125 mempool_t *ctx_mempool;
4128 void __iomem *nx_pcibase; /* Base I/O address */
4129 void __iomem *nxdb_rd_ptr; /* Doorbell read pointer */
4130 void __iomem *nxdb_wr_ptr; /* Door bell write pointer */
4132 uint32_t crb_win;
4133 uint32_t curr_window;
4134 uint32_t ddr_mn_window;
4135 unsigned long mn_win_crb;
4136 unsigned long ms_win_crb;
4137 int qdr_sn_window;
4138 uint32_t fcoe_dev_init_timeout;
4139 uint32_t fcoe_reset_timeout;
4140 rwlock_t hw_lock;
4141 uint16_t portnum; /* port number */
4142 int link_width;
4143 struct fw_blob *hablob;
4144 struct qla82xx_legacy_intr_set nx_legacy_intr;
4146 uint16_t gbl_dsd_inuse;
4147 uint16_t gbl_dsd_avail;
4148 struct list_head gbl_dsd_list;
4151 uint8_t fw_type;
4152 __le32 file_prd_off; /* File firmware product offset */
4154 uint32_t md_template_size;
4155 void *md_tmplt_hdr;
4156 dma_addr_t md_tmplt_hdr_dma;
4157 void *md_dump;
4158 uint32_t md_dump_size;
4160 void *loop_id_map;
4163 uint32_t idc_audit_ts;
4164 uint32_t idc_extend_tmo;
4167 struct workqueue_struct *dpc_lp_wq;
4168 struct work_struct idc_aen;
4170 struct workqueue_struct *dpc_hp_wq;
4171 struct work_struct nic_core_reset;
4172 struct work_struct idc_state_handler;
4173 struct work_struct nic_core_unrecoverable;
4174 struct work_struct board_disable;
4176 struct mr_data_fx00 mr;
4177 uint32_t chip_reset;
4179 struct qlt_hw_data tgt;
4180 int allow_cna_fw_dump;
4181 uint32_t fw_ability_mask;
4182 uint16_t min_link_speed;
4183 uint16_t max_speed_sup;
4185 atomic_t nvme_active_aen_cnt;
4186 uint16_t nvme_last_rptd_aen; /* Last recorded aen count */