Lines Matching refs:U32
193 U32 Doorbell; /*0x00 */
194 U32 WriteSequence; /*0x04 */
195 U32 HostDiagnostic; /*0x08 */
196 U32 Reserved1; /*0x0C */
197 U32 DiagRWData; /*0x10 */
198 U32 DiagRWAddressLow; /*0x14 */
199 U32 DiagRWAddressHigh; /*0x18 */
200 U32 Reserved2[5]; /*0x1C */
201 U32 HostInterruptStatus; /*0x30 */
202 U32 HostInterruptMask; /*0x34 */
203 U32 DCRData; /*0x38 */
204 U32 DCRAddress; /*0x3C */
205 U32 Reserved3[2]; /*0x40 */
206 U32 ReplyFreeHostIndex; /*0x48 */
207 U32 Reserved4[8]; /*0x4C */
208 U32 ReplyPostHostIndex; /*0x6C */
209 U32 Reserved5; /*0x70 */
210 U32 HCBSize; /*0x74 */
211 U32 HCBAddressLow; /*0x78 */
212 U32 HCBAddressHigh; /*0x7C */
213 U32 Reserved6[12]; /*0x80 */
214 U32 Scratchpad[4]; /*0xB0 */
215 U32 RequestDescriptorPostLow; /*0xC0 */
216 U32 RequestDescriptorPostHigh; /*0xC4 */
217 U32 AtomicRequestDescriptorPost;/*0xC8 */
218 U32 Reserved7[13]; /*0xCC */
506 U32 DescriptorTypeDependent2; /*0x04 */
532 U32 ReplyFrameAddress; /*0x04 */
586 U32 Reserved; /*0x04 */
820 U32 IOCLogInfo; /*0x10 */
835 U32 Word;
857 U32 FlagsLength;
858 U32 Address;
863 U32 FlagsLength;
869 U32 FlagsLength;
871 U32 Address32;
887 U32 Address;
904 U32 Address32;
921 U32 TransactionContext[1];
922 U32 TransactionDetails[1];
933 U32 TransactionContext[2];
934 U32 TransactionDetails[1];
945 U32 TransactionContext[3];
946 U32 TransactionDetails[1];
955 U32 TransactionContext[4];
956 U32 TransactionDetails[1];
966 U32 TransactionContext32[1];
967 U32 TransactionContext64[2];
968 U32 TransactionContext96[3];
969 U32 TransactionContext128[4];
971 U32 TransactionDetails[1];
1074 #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
1109 U32 Address;
1110 U32 FlagsLength;
1116 U32 Length;
1152 U32 Length;
1226 #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)