Lines Matching refs:uint32_t
80 uint32_t Revision:8;
81 uint32_t InId:24;
83 uint32_t word;
89 uint32_t CmdRsp:16;
90 uint32_t Size:16;
92 uint32_t word;
115 uint32_t PortID;
133 uint32_t PortId; /* For RFT_ID requests */
136 uint32_t rsvd0:16;
137 uint32_t rsvd1:7;
138 uint32_t fcpReg:1; /* Type 8 */
139 uint32_t rsvd2:2;
140 uint32_t ipReg:1; /* Type 5 */
141 uint32_t rsvd3:5;
143 uint32_t rsvd0:16;
144 uint32_t fcpReg:1; /* Type 8 */
145 uint32_t rsvd1:7;
146 uint32_t rsvd3:5;
147 uint32_t ipReg:1; /* Type 5 */
148 uint32_t rsvd2:2;
151 uint32_t rsvd[7];
154 uint32_t PortId; /* For RNN_ID requests */
163 uint32_t port_id;
166 uint32_t PortId;
171 uint32_t PortId;
177 uint32_t PortId;
180 uint32_t fc4_types[8];
184 uint32_t PortId;
439 uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */
442 uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */
525 uint32_t vid;
527 uint32_t flags;
537 uint32_t word0;
556 uint32_t word1;
653 uint32_t lsRjtError;
704 uint32_t nPortId32; /* Access nPortId as a word */
755 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
757 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
827 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
829 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
831 uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */
835 uint32_t hardAL_PA;
838 uint32_t DID;
842 uint32_t Mflags:8;
843 uint32_t Odid:24;
853 uint32_t Rflags:8;
854 uint32_t Rdid:24;
866 uint32_t Fdid;
885 uint32_t unitType;
889 uint32_t physPort;
890 uint32_t attachedNodes;
917 uint32_t portNum;
925 uint32_t linkFailureCnt;
926 uint32_t lossSyncCnt;
927 uint32_t lossSignalCnt;
928 uint32_t primSeqErrCnt;
929 uint32_t invalidXmitWord;
930 uint32_t crcCnt;
934 uint32_t rls;
944 uint32_t linkFailureCnt;
945 uint32_t lossSyncCnt;
946 uint32_t lossSignalCnt;
947 uint32_t primSeqErrCnt;
948 uint32_t invalidXmitWord;
949 uint32_t crcCnt;
953 uint32_t rrq;
960 uint32_t rrq_exchg;
973 uint32_t ratov;
974 uint32_t edtov;
975 uint32_t qtov;
995 uint32_t maxsize;
996 uint32_t index;
1000 uint32_t portNum;
1001 uint32_t portID;
1006 uint32_t listLen;
1007 uint32_t index;
1014 uint32_t word;
1066 uint32_t lcb_command; /* ELS command opcode (0x81) */
1086 uint32_t lcb_ls_acc; /* Acceptance of LCB request (0x02) */
1131 uint32_t link_failure_cnt;
1132 uint32_t loss_of_synch_cnt;
1133 uint32_t loss_of_signal_cnt;
1134 uint32_t primitive_seq_proto_err;
1135 uint32_t invalid_trans_word;
1136 uint32_t invalid_crc_cnt;
1142 uint32_t tag; /* 0001 0003h */
1143 uint32_t length; /* set to size of payload struct */
1149 uint32_t CorrectedBlocks;
1150 uint32_t UncorrectableBlocks;
1155 uint32_t tag;
1156 uint32_t length;
1162 uint32_t port_type; /* bits 31-30 only */
1167 uint32_t tag; /* 0001 0002h */
1168 uint32_t length; /* set to size of payload struct */
1204 uint32_t tag; /* 00010001h */
1205 uint32_t length; /* set to size of payload struct */
1212 uint32_t tag; /* 0000 0003h, big endian */
1213 uint32_t length; /* size of RDP_N_PORT_ID struct */
1214 uint32_t nport_id : 12;
1215 uint32_t reserved : 8;
1220 uint32_t els_req; /* Request payload word 0 value.*/
1225 uint32_t tag; /* Descriptor tag 1 */
1226 uint32_t length; /* set to size of payload struct. */
1242 uint32_t tag;
1243 uint32_t length; /* set to size of sfp_info struct */
1249 uint32_t port_bbc; /* FC_Port buffer-to-buffer credit */
1250 uint32_t attached_port_bbc;
1251 uint32_t rtt; /* Round trip time */
1255 uint32_t tag;
1256 uint32_t length;
1279 uint32_t function_flags;
1283 uint32_t tag;
1284 uint32_t length;
1299 uint32_t tag;
1300 uint32_t length;
1305 uint32_t rdp_command; /* ELS command opcode (0x18)*/
1306 uint32_t rdp_des_length; /* RDP Payload Word 1 */
1312 uint32_t reply_sequence; /* FC word0 LS_ACC or LS_RJT */
1313 uint32_t length; /* FC Word 1 */
1340 uint32_t EntryCnt;
1341 uint32_t pe; /* Variable-length array */
1349 uint32_t AttrType:16;
1350 uint32_t AttrLen:16;
1351 uint32_t AttrValue; /* Marks start of Value (ATTRIBUTE_ENTRY) */
1358 uint32_t AttrInt;
1371 uint32_t EntryCnt; /* Number of HBA attribute entries */
1653 uint32_t hostAtt; /* See definitions for Host Attention
1655 uint32_t chipAtt; /* See definitions for Chip Attention
1657 uint32_t hostStatus; /* See definitions for Host Status register */
1658 uint32_t hostControl; /* See definitions for Host Control register */
1659 uint32_t buiConfig; /* See definitions for BIU configuration
1998 uint32_t bdeAddress;
2000 uint32_t bdeReserved:4;
2001 uint32_t bdeAddrHigh:4;
2002 uint32_t bdeSize:24;
2004 uint32_t bdeSize:24;
2005 uint32_t bdeAddrHigh:4;
2006 uint32_t bdeReserved:4;
2012 uint32_t bdeFlags:8; /* BDL Flags */
2013 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2015 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2016 uint32_t bdeFlags:8; /* BDL Flags */
2019 uint32_t addrLow; /* Address 0:31 */
2020 uint32_t addrHigh; /* Address 32:63 */
2021 uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */
2052 uint32_t word0;
2059 uint32_t reftag; /* Reference Tag Value */
2060 uint32_t reftagtr; /* Reference Tag Translation Value */
2064 uint32_t word0;
2071 uint32_t word1;
2084 uint32_t word2;
2115 uint32_t word0;
2122 uint32_t addrHigh;
2123 uint32_t addrLow;
2130 uint32_t rsvd2:25;
2131 uint32_t acknowledgment:1;
2132 uint32_t version:1;
2133 uint32_t erase_or_prog:1;
2134 uint32_t update_flash:1;
2135 uint32_t update_ram:1;
2136 uint32_t method:1;
2137 uint32_t load_cmplt:1;
2139 uint32_t load_cmplt:1;
2140 uint32_t method:1;
2141 uint32_t update_ram:1;
2142 uint32_t update_flash:1;
2143 uint32_t erase_or_prog:1;
2144 uint32_t version:1;
2145 uint32_t acknowledgment:1;
2146 uint32_t rsvd2:25;
2149 uint32_t dl_to_adr_low;
2150 uint32_t dl_to_adr_high;
2151 uint32_t dl_len;
2153 uint32_t dl_from_mbx_offset;
2163 uint32_t rsvd1[3]; /* Read as all one's */
2164 uint32_t rsvd2; /* Read as all zero's */
2165 uint32_t portname[2]; /* N_PORT name */
2166 uint32_t nodename[2]; /* NODE name */
2169 uint32_t pref_DID:24;
2170 uint32_t hardAL_PA:8;
2172 uint32_t hardAL_PA:8;
2173 uint32_t pref_DID:24;
2176 uint32_t rsvd3[21]; /* Read as all one's */
2182 uint32_t rsvd1[3]; /* Must be all one's */
2183 uint32_t rsvd2; /* Must be all zero's */
2184 uint32_t portname[2]; /* N_PORT name */
2185 uint32_t nodename[2]; /* NODE name */
2188 uint32_t pref_DID:24;
2189 uint32_t hardAL_PA:8;
2191 uint32_t hardAL_PA:8;
2192 uint32_t pref_DID:24;
2195 uint32_t rsvd3[21]; /* Must be all one's */
2202 uint32_t rsvd1;
2217 uint32_t word1;
2222 uint32_t offset;
2230 uint32_t rsvd1:24;
2231 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2233 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2234 uint32_t rsvd1:24;
2259 uint32_t link_speed;
2277 uint32_t rsvd1;
2284 uint32_t cr:1;
2285 uint32_t ci:1;
2286 uint32_t cr_delay:6;
2287 uint32_t cr_count:8;
2288 uint32_t rsvd1:8;
2289 uint32_t MaxBBC:8;
2291 uint32_t MaxBBC:8;
2292 uint32_t rsvd1:8;
2293 uint32_t cr_count:8;
2294 uint32_t cr_delay:6;
2295 uint32_t ci:1;
2296 uint32_t cr:1;
2299 uint32_t myId;
2300 uint32_t rsvd2;
2301 uint32_t edtov;
2302 uint32_t arbtov;
2303 uint32_t ratov;
2304 uint32_t rttov;
2305 uint32_t altov;
2306 uint32_t crtov;
2309 uint32_t rsvd4:19;
2310 uint32_t cscn:1;
2311 uint32_t bbscn:4;
2312 uint32_t rsvd3:8;
2314 uint32_t rsvd3:8;
2315 uint32_t bbscn:4;
2316 uint32_t cscn:1;
2317 uint32_t rsvd4:19;
2321 uint32_t rrq_enable:1;
2322 uint32_t rrq_immed:1;
2323 uint32_t rsvd5:29;
2324 uint32_t ack0_enable:1;
2326 uint32_t ack0_enable:1;
2327 uint32_t rsvd5:29;
2328 uint32_t rrq_immed:1;
2329 uint32_t rrq_enable:1;
2352 uint32_t unused1:24;
2353 uint32_t numRing:8;
2355 uint32_t numRing:8;
2356 uint32_t unused1:24;
2360 uint32_t hbainit;
2367 uint32_t unused2:6;
2368 uint32_t recvSeq:1;
2369 uint32_t recvNotify:1;
2370 uint32_t numMask:8;
2371 uint32_t profile:8;
2372 uint32_t unused1:4;
2373 uint32_t ring:4;
2375 uint32_t ring:4;
2376 uint32_t unused1:4;
2377 uint32_t profile:8;
2378 uint32_t numMask:8;
2379 uint32_t recvNotify:1;
2380 uint32_t recvSeq:1;
2381 uint32_t unused2:6;
2398 uint32_t ring_no;
2405 uint32_t cr:1;
2406 uint32_t ci:1;
2407 uint32_t cr_delay:6;
2408 uint32_t cr_count:8;
2409 uint32_t InitBBC:8;
2410 uint32_t MaxBBC:8;
2412 uint32_t MaxBBC:8;
2413 uint32_t InitBBC:8;
2414 uint32_t cr_count:8;
2415 uint32_t cr_delay:6;
2416 uint32_t ci:1;
2417 uint32_t cr:1;
2421 uint32_t topology:8;
2422 uint32_t myDid:24;
2424 uint32_t myDid:24;
2425 uint32_t topology:8;
2430 uint32_t AR:1;
2431 uint32_t IR:1;
2432 uint32_t rsvd1:29;
2433 uint32_t ack0:1;
2435 uint32_t ack0:1;
2436 uint32_t rsvd1:29;
2437 uint32_t IR:1;
2438 uint32_t AR:1;
2441 uint32_t edtov;
2442 uint32_t arbtov;
2443 uint32_t ratov;
2444 uint32_t rttov;
2445 uint32_t altov;
2446 uint32_t lmt;
2458 uint32_t rsvd2;
2459 uint32_t rsvd3;
2460 uint32_t max_xri;
2461 uint32_t max_iocb;
2462 uint32_t max_rpi;
2463 uint32_t avail_xri;
2464 uint32_t avail_iocb;
2465 uint32_t avail_rpi;
2466 uint32_t max_vpi;
2467 uint32_t rsvd4;
2468 uint32_t rsvd5;
2469 uint32_t avail_vpi;
2476 uint32_t rsvd2:7;
2477 uint32_t recvNotify:1;
2478 uint32_t numMask:8;
2479 uint32_t profile:8;
2480 uint32_t rsvd1:4;
2481 uint32_t ring:4;
2483 uint32_t ring:4;
2484 uint32_t rsvd1:4;
2485 uint32_t profile:8;
2486 uint32_t numMask:8;
2487 uint32_t recvNotify:1;
2488 uint32_t rsvd2:7;
2526 uint32_t rsvd1;
2527 uint32_t rsvd2;
2546 uint32_t rsvd1:31;
2547 uint32_t clrCounters:1;
2551 uint32_t clrCounters:1;
2552 uint32_t rsvd1:31;
2557 uint32_t xmitByteCnt;
2558 uint32_t rcvByteCnt;
2559 uint32_t xmitFrameCnt;
2560 uint32_t rcvFrameCnt;
2561 uint32_t xmitSeqCnt;
2562 uint32_t rcvSeqCnt;
2563 uint32_t totalOrigExchanges;
2564 uint32_t totalRespExchanges;
2565 uint32_t rcvPbsyCnt;
2566 uint32_t rcvFbsyCnt;
2576 uint32_t rsvd2:8;
2577 uint32_t DID:24;
2581 uint32_t DID:24;
2582 uint32_t rsvd2:8;
2600 uint32_t rsvd2:8;
2601 uint32_t DID:24;
2602 uint32_t rsvd3:8;
2603 uint32_t SID:24;
2604 uint32_t rsvd4;
2610 uint32_t rsvd6:30;
2611 uint32_t si:1;
2612 uint32_t exchOrig:1;
2618 uint32_t DID:24;
2619 uint32_t rsvd2:8;
2620 uint32_t SID:24;
2621 uint32_t rsvd3:8;
2622 uint32_t rsvd4;
2628 uint32_t exchOrig:1;
2629 uint32_t si:1;
2630 uint32_t rsvd6:30;
2638 uint32_t cv:1;
2639 uint32_t rr:1;
2640 uint32_t rsvd2:2;
2641 uint32_t v3req:1;
2642 uint32_t v3rsp:1;
2643 uint32_t rsvd1:25;
2644 uint32_t rv:1;
2646 uint32_t rv:1;
2647 uint32_t rsvd1:25;
2648 uint32_t v3rsp:1;
2649 uint32_t v3req:1;
2650 uint32_t rsvd2:2;
2651 uint32_t rr:1;
2652 uint32_t cv:1;
2655 uint32_t biuRev;
2656 uint32_t smRev;
2658 uint32_t smFwRev;
2680 uint32_t endecRev;
2693 uint32_t postKernRev;
2694 uint32_t opFwRev;
2696 uint32_t sli1FwRev;
2698 uint32_t sli2FwRev;
2700 uint32_t sli3Feat;
2701 uint32_t RandomData[6];
2707 uint32_t word0;
2737 uint32_t linkFailureCnt;
2738 uint32_t lossSyncCnt;
2739 uint32_t lossSignalCnt;
2740 uint32_t primSeqErrCnt;
2741 uint32_t invalidXmitWord;
2742 uint32_t crcCnt;
2743 uint32_t primSeqTimeout;
2744 uint32_t elasticOverrun;
2745 uint32_t arbTimeout;
2746 uint32_t advRecBufCredit;
2747 uint32_t curRecBufCredit;
2748 uint32_t advTransBufCredit;
2749 uint32_t curTransBufCredit;
2750 uint32_t recEofCount;
2751 uint32_t recEofdtiCount;
2752 uint32_t recEofniCount;
2753 uint32_t recSofcount;
2754 uint32_t rsvd1;
2755 uint32_t rsvd2;
2756 uint32_t recDrpXriCount;
2757 uint32_t fecCorrBlkCount;
2758 uint32_t fecUncorrBlkCount;
2768 uint32_t rsvd2:8;
2769 uint32_t did:24;
2773 uint32_t did:24;
2774 uint32_t rsvd2:8;
2805 uint32_t word;
2814 uint32_t rsvd2;
2815 uint32_t rsvd3;
2816 uint32_t rsvd4;
2817 uint32_t rsvd5;
2823 uint32_t rsvd2;
2824 uint32_t rsvd3;
2825 uint32_t rsvd4;
2826 uint32_t rsvd5;
2835 uint32_t rsvd1;
2836 uint32_t rsvd2:7;
2837 uint32_t upd:1;
2838 uint32_t sid:24;
2839 uint32_t wwn[2];
2840 uint32_t rsvd5;
2844 uint32_t rsvd1;
2845 uint32_t sid:24;
2846 uint32_t upd:1;
2847 uint32_t rsvd2:7;
2848 uint32_t wwn[2];
2849 uint32_t rsvd5;
2857 uint32_t rsvd1;
2865 uint32_t rsvd3;
2866 uint32_t rsvd4;
2867 uint32_t rsvd5;
2880 uint32_t did;
2881 uint32_t rsvd2;
2882 uint32_t rsvd3;
2883 uint32_t rsvd4;
2884 uint32_t rsvd5;
2896 uint32_t eventTag; /* Event tag */
2897 uint32_t word2;
2917 uint32_t word3;
2936 uint32_t word7;
2955 uint32_t word8;
2990 uint32_t eventTag; /* Event tag */
2991 uint32_t rsvd1;
2998 uint32_t rsvd:25;
2999 uint32_t ra:1;
3000 uint32_t co:1;
3001 uint32_t cv:1;
3002 uint32_t type:4;
3003 uint32_t entry_index:16;
3004 uint32_t region_id:16;
3006 uint32_t type:4;
3007 uint32_t cv:1;
3008 uint32_t co:1;
3009 uint32_t ra:1;
3010 uint32_t rsvd:25;
3011 uint32_t region_id:16;
3012 uint32_t entry_index:16;
3015 uint32_t sli4_length;
3016 uint32_t word_cnt;
3017 uint32_t resp_offset;
3050 uint32_t signature;
3051 uint32_t rev;
3053 uint32_t resvd[66];
3061 uint32_t ver:4; /* Major Version */
3062 uint32_t rev:4; /* Revision */
3063 uint32_t lev:2; /* Level */
3064 uint32_t dist:2; /* Dist Type */
3065 uint32_t num:4; /* number after dist type */
3067 uint32_t num:4; /* number after dist type */
3068 uint32_t dist:2; /* Dist Type */
3069 uint32_t lev:2; /* Level */
3070 uint32_t rev:4; /* Revision */
3071 uint32_t ver:4; /* Major Version */
3081 uint32_t rsvd2:16;
3082 uint32_t type:8;
3083 uint32_t rsvd:1;
3084 uint32_t ra:1;
3085 uint32_t co:1;
3086 uint32_t cv:1;
3087 uint32_t req:4;
3088 uint32_t entry_length:16;
3089 uint32_t region_id:16;
3091 uint32_t req:4;
3092 uint32_t cv:1;
3093 uint32_t co:1;
3094 uint32_t ra:1;
3095 uint32_t rsvd:1;
3096 uint32_t type:8;
3097 uint32_t rsvd2:16;
3098 uint32_t region_id:16;
3099 uint32_t entry_length:16;
3102 uint32_t resp_info;
3103 uint32_t byte_cnt;
3104 uint32_t data_offset;
3126 uint32_t rsvd1 :7;
3127 uint32_t recvNotify :1; /* Receive Notification */
3128 uint32_t numMask :8; /* # Mask Entries */
3129 uint32_t profile :8; /* Selection Profile */
3130 uint32_t rsvd2 :8;
3132 uint32_t rsvd2 :8;
3133 uint32_t profile :8; /* Selection Profile */
3134 uint32_t numMask :8; /* # Mask Entries */
3135 uint32_t recvNotify :1; /* Receive Notification */
3136 uint32_t rsvd1 :7;
3140 uint32_t hbqId :16;
3141 uint32_t rsvd3 :12;
3142 uint32_t ringMask :4;
3144 uint32_t ringMask :4;
3145 uint32_t rsvd3 :12;
3146 uint32_t hbqId :16;
3150 uint32_t entry_count :16;
3151 uint32_t rsvd4 :8;
3152 uint32_t headerLen :8;
3154 uint32_t headerLen :8;
3155 uint32_t rsvd4 :8;
3156 uint32_t entry_count :16;
3159 uint32_t hbqaddrLow;
3160 uint32_t hbqaddrHigh;
3163 uint32_t rsvd5 :31;
3164 uint32_t logEntry :1;
3166 uint32_t logEntry :1;
3167 uint32_t rsvd5 :31;
3170 uint32_t rsvd6; /* w7 */
3171 uint32_t rsvd7; /* w8 */
3172 uint32_t rsvd8; /* w9 */
3178 uint32_t allprofiles[12];
3182 uint32_t seqlenoff :16;
3183 uint32_t maxlen :16;
3185 uint32_t maxlen :16;
3186 uint32_t seqlenoff :16;
3189 uint32_t rsvd1 :28;
3190 uint32_t seqlenbcnt :4;
3192 uint32_t seqlenbcnt :4;
3193 uint32_t rsvd1 :28;
3195 uint32_t rsvd[10];
3200 uint32_t seqlenoff :16;
3201 uint32_t maxlen :16;
3203 uint32_t maxlen :16;
3204 uint32_t seqlenoff :16;
3207 uint32_t cmdcodeoff :28;
3208 uint32_t rsvd1 :12;
3209 uint32_t seqlenbcnt :4;
3211 uint32_t seqlenbcnt :4;
3212 uint32_t rsvd1 :12;
3213 uint32_t cmdcodeoff :28;
3215 uint32_t cmdmatch[8];
3217 uint32_t rsvd[2];
3222 uint32_t seqlenoff :16;
3223 uint32_t maxlen :16;
3225 uint32_t maxlen :16;
3226 uint32_t seqlenoff :16;
3229 uint32_t cmdcodeoff :28;
3230 uint32_t rsvd1 :12;
3231 uint32_t seqlenbcnt :4;
3233 uint32_t seqlenbcnt :4;
3234 uint32_t rsvd1 :12;
3235 uint32_t cmdcodeoff :28;
3237 uint32_t cmdmatch[8];
3239 uint32_t rsvd[2];
3251 uint32_t cBE : 1;
3252 uint32_t cET : 1;
3253 uint32_t cHpcb : 1;
3254 uint32_t cMA : 1;
3255 uint32_t sli_mode : 4;
3256 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3259 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3261 uint32_t sli_mode : 4;
3262 uint32_t cMA : 1;
3263 uint32_t cHpcb : 1;
3264 uint32_t cET : 1;
3265 uint32_t cBE : 1;
3268 uint32_t pcbLow; /* bit 31:0 of memory based port config block */
3269 uint32_t pcbHigh; /* bit 63:32 of memory based port config block */
3270 uint32_t hbainit[5];
3272 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3273 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3275 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3276 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3280 uint32_t rsvd1 : 19; /* Reserved */
3281 uint32_t cdss : 1; /* Configure Data Security SLI */
3282 uint32_t casabt : 1; /* Configure async abts status notice */
3283 uint32_t rsvd2 : 2; /* Reserved */
3284 uint32_t cbg : 1; /* Configure BlockGuard */
3285 uint32_t cmv : 1; /* Configure Max VPIs */
3286 uint32_t ccrp : 1; /* Config Command Ring Polling */
3287 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3288 uint32_t chbs : 1; /* Cofigure Host Backing store */
3289 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3290 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3291 uint32_t cmx : 1; /* Configure Max XRIs */
3292 uint32_t cmr : 1; /* Configure Max RPIs */
3294 uint32_t cmr : 1; /* Configure Max RPIs */
3295 uint32_t cmx : 1; /* Configure Max XRIs */
3296 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3297 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3298 uint32_t chbs : 1; /* Cofigure Host Backing store */
3299 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3300 uint32_t ccrp : 1; /* Config Command Ring Polling */
3301 uint32_t cmv : 1; /* Configure Max VPIs */
3302 uint32_t cbg : 1; /* Configure BlockGuard */
3303 uint32_t rsvd2 : 2; /* Reserved */
3304 uint32_t casabt : 1; /* Configure async abts status notice */
3305 uint32_t cdss : 1; /* Configure Data Security SLI */
3306 uint32_t rsvd1 : 19; /* Reserved */
3309 uint32_t rsvd3 : 19; /* Reserved */
3310 uint32_t gdss : 1; /* Configure Data Security SLI */
3311 uint32_t gasabt : 1; /* Grant async abts status notice */
3312 uint32_t rsvd4 : 2; /* Reserved */
3313 uint32_t gbg : 1; /* Grant BlockGuard */
3314 uint32_t gmv : 1; /* Grant Max VPIs */
3315 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3316 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3317 uint32_t ghbs : 1; /* Grant Host Backing Store */
3318 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3319 uint32_t gerbm : 1; /* Grant ERBM Request */
3320 uint32_t gmx : 1; /* Grant Max XRIs */
3321 uint32_t gmr : 1; /* Grant Max RPIs */
3323 uint32_t gmr : 1; /* Grant Max RPIs */
3324 uint32_t gmx : 1; /* Grant Max XRIs */
3325 uint32_t gerbm : 1; /* Grant ERBM Request */
3326 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3327 uint32_t ghbs : 1; /* Grant Host Backing Store */
3328 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3329 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3330 uint32_t gmv : 1; /* Grant Max VPIs */
3331 uint32_t gbg : 1; /* Grant BlockGuard */
3332 uint32_t rsvd4 : 2; /* Reserved */
3333 uint32_t gasabt : 1; /* Grant async abts status notice */
3334 uint32_t gdss : 1; /* Configure Data Security SLI */
3335 uint32_t rsvd3 : 19; /* Reserved */
3339 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3340 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3342 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3343 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3347 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3348 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3350 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3351 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3354 uint32_t rsvd6; /* Reserved */
3357 uint32_t fips_rev : 3; /* FIPS Spec Revision */
3358 uint32_t fips_level : 4; /* FIPS Level */
3359 uint32_t sec_err : 9; /* security crypto error */
3360 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3362 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3363 uint32_t sec_err : 9; /* security crypto error */
3364 uint32_t fips_level : 4; /* FIPS Level */
3365 uint32_t fips_rev : 3; /* FIPS Spec Revision */
3373 uint32_t dfltMsgNum:8; /* Default message number */
3374 uint32_t rsvd1:11; /* Reserved */
3375 uint32_t NID:5; /* Number of secondary attention IDs */
3376 uint32_t rsvd2:5; /* Reserved */
3377 uint32_t dfltPresent:1; /* Default message number present */
3378 uint32_t addFlag:1; /* Add association flag */
3379 uint32_t reportFlag:1; /* Report association flag */
3381 uint32_t reportFlag:1; /* Report association flag */
3382 uint32_t addFlag:1; /* Add association flag */
3383 uint32_t dfltPresent:1; /* Default message number present */
3384 uint32_t rsvd2:5; /* Reserved */
3385 uint32_t NID:5; /* Number of secondary attention IDs */
3386 uint32_t rsvd1:11; /* Reserved */
3387 uint32_t dfltMsgNum:8; /* Default message number */
3389 uint32_t attentionConditions[2];
3393 uint32_t autoClearHA[2];
3395 uint32_t rsvd3:16;
3396 uint32_t autoClearID:16;
3398 uint32_t autoClearID:16;
3399 uint32_t rsvd3:16;
3401 uint32_t rsvd4;
3410 uint32_t cmdEntries;
3411 uint32_t cmdAddrLow;
3412 uint32_t cmdAddrHigh;
3414 uint32_t rspEntries;
3415 uint32_t rspAddrLow;
3416 uint32_t rspAddrHigh;
3421 uint32_t type:8;
3423 uint32_t feature:8;
3425 uint32_t rsvd:12;
3426 uint32_t maxRing:4;
3428 uint32_t maxRing:4;
3429 uint32_t rsvd:12;
3430 uint32_t feature:8;
3432 uint32_t type:8;
3436 uint32_t mailBoxSize;
3437 uint32_t mbAddrLow;
3438 uint32_t mbAddrHigh;
3440 uint32_t hgpAddrLow;
3441 uint32_t hgpAddrHigh;
3443 uint32_t pgpAddrLow;
3444 uint32_t pgpAddrHigh;
3451 uint32_t rsvd0:27;
3452 uint32_t discardFarp:1;
3453 uint32_t IPEnable:1;
3454 uint32_t nodeName:1;
3455 uint32_t portName:1;
3456 uint32_t filterEnable:1;
3458 uint32_t filterEnable:1;
3459 uint32_t portName:1;
3460 uint32_t nodeName:1;
3461 uint32_t IPEnable:1;
3462 uint32_t discardFarp:1;
3463 uint32_t rsvd:27;
3468 uint32_t rsvd1;
3469 uint32_t rsvd2;
3470 uint32_t rsvd3;
3471 uint32_t IPAddress;
3478 uint32_t rsvd:30;
3479 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3481 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3482 uint32_t rsvd:30;
3488 #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t))
3491 #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t))
3497 uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/
3554 uint32_t unused1[16];
3561 uint32_t reserved[8];
3562 uint32_t hbq_put[16];
3567 uint32_t hbq_get[16];
3718 uint32_t reserved;
3723 uint32_t reserved[4];
3730 uint32_t xrsqRo; /* Starting Relative Offset */
3740 uint32_t word4Rsvd:7;
3741 uint32_t fl:1;
3742 uint32_t myID:24;
3743 uint32_t word5Rsvd:8;
3744 uint32_t remoteID:24;
3746 uint32_t myID:24;
3747 uint32_t fl:1;
3748 uint32_t word4Rsvd:7;
3749 uint32_t remoteID:24;
3750 uint32_t word5Rsvd:8;
3757 uint32_t parmRo;
3760 uint32_t word5Rsvd:8;
3761 uint32_t remoteID:24;
3763 uint32_t remoteID:24;
3764 uint32_t word5Rsvd:8;
3770 uint32_t rsvd[3];
3771 uint32_t abortType;
3774 uint32_t parm;
3786 uint32_t rsvd[3];
3787 uint32_t abortType;
3788 uint32_t parm;
3789 uint32_t iotag32;
3794 uint32_t rsvd[4];
3795 uint32_t parmRo;
3797 uint32_t word5Rsvd:8;
3798 uint32_t remoteID:24;
3800 uint32_t remoteID:24;
3801 uint32_t word5Rsvd:8;
3809 uint32_t fcpi_parm;
3810 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3816 uint32_t fcpt_Offset;
3817 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3825 uint32_t xrsqRo; /* Starting Relative Offset */
3835 uint32_t rsvd1;
3836 uint32_t xrsqRo; /* Starting Relative Offset */
3844 uint32_t word4Rsvd:7;
3845 uint32_t fl:1;
3846 uint32_t myID:24;
3847 uint32_t word5Rsvd:8;
3848 uint32_t remoteID:24;
3850 uint32_t myID:24;
3851 uint32_t fl:1;
3852 uint32_t word4Rsvd:7;
3853 uint32_t remoteID:24;
3854 uint32_t word5Rsvd:8;
3861 uint32_t xrsqRo; /* Starting Relative Offset */
3868 uint32_t rcvd1;
3869 uint32_t parmRo;
3872 uint32_t word5Rsvd:8;
3873 uint32_t remoteID:24;
3875 uint32_t remoteID:24;
3876 uint32_t word5Rsvd:8;
3883 uint32_t hbq_1;
3884 uint32_t parmRo;
3886 uint32_t rctl:8;
3887 uint32_t type:8;
3888 uint32_t dfctl:8;
3889 uint32_t ls:1;
3890 uint32_t fs:1;
3891 uint32_t rsvd2:3;
3892 uint32_t si:1;
3893 uint32_t bc:1;
3894 uint32_t rsvd3:1;
3896 uint32_t rsvd3:1;
3897 uint32_t bc:1;
3898 uint32_t si:1;
3899 uint32_t rsvd2:3;
3900 uint32_t fs:1;
3901 uint32_t ls:1;
3902 uint32_t dfctl:8;
3903 uint32_t type:8;
3904 uint32_t rctl:8;
3911 uint32_t fcpi_parm;
3912 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3918 uint32_t fcpt_Offset;
3919 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3924 uint32_t rsvd[4];
3925 uint32_t param;
3955 uint32_t word10Rsvd;
3956 uint32_t acc_len; /* accumulated length */
3963 uint32_t buffer_tag;
3969 uint32_t rsvd;
3970 uint32_t rsvd1;
3974 uint32_t iotag64_low;
3975 uint32_t iotag64_high;
3976 uint32_t ebde_count;
3977 uint32_t rsvd;
3982 uint32_t filler[6]; /* word 8-13 in IOCB */
3983 uint32_t bghm; /* word 14 - BlockGuard High Water Mark */
4003 uint32_t bgstat; /* word 15 - BlockGuard Status */
4006 static inline uint32_t
4007 lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bidir_bg_prof()
4013 static inline uint32_t
4014 lpfc_bgs_get_bidir_err_cond(uint32_t bgstat) in lpfc_bgs_get_bidir_err_cond()
4020 static inline uint32_t
4021 lpfc_bgs_get_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bg_prof()
4027 static inline uint32_t
4028 lpfc_bgs_get_invalid_prof(uint32_t bgstat) in lpfc_bgs_get_invalid_prof()
4034 static inline uint32_t
4035 lpfc_bgs_get_uninit_dif_block(uint32_t bgstat) in lpfc_bgs_get_uninit_dif_block()
4041 static inline uint32_t
4042 lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat) in lpfc_bgs_get_hi_water_mark_present()
4048 static inline uint32_t
4049 lpfc_bgs_get_reftag_err(uint32_t bgstat) in lpfc_bgs_get_reftag_err()
4055 static inline uint32_t
4056 lpfc_bgs_get_apptag_err(uint32_t bgstat) in lpfc_bgs_get_apptag_err()
4062 static inline uint32_t
4063 lpfc_bgs_get_guard_err(uint32_t bgstat) in lpfc_bgs_get_guard_err()
4071 uint32_t io_tag64_low;
4072 uint32_t io_tag64_high;
4084 uint32_t reserved4;
4116 uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */
4145 uint32_t ulpTimeout:8;
4146 uint32_t ulpXS:1;
4147 uint32_t ulpFCP2Rcvy:1;
4148 uint32_t ulpPU:2;
4149 uint32_t ulpIr:1;
4150 uint32_t ulpClass:3;
4151 uint32_t ulpCommand:8;
4152 uint32_t ulpStatus:4;
4153 uint32_t ulpBdeCount:2;
4154 uint32_t ulpLe:1;
4155 uint32_t ulpOwner:1; /* Low order bit word 7 */
4157 uint32_t ulpOwner:1; /* Low order bit word 7 */
4158 uint32_t ulpLe:1;
4159 uint32_t ulpBdeCount:2;
4160 uint32_t ulpStatus:4;
4161 uint32_t ulpCommand:8;
4162 uint32_t ulpClass:3;
4163 uint32_t ulpIr:1;
4164 uint32_t ulpPU:2;
4165 uint32_t ulpFCP2Rcvy:1;
4166 uint32_t ulpXS:1;
4167 uint32_t ulpTimeout:8;
4176 uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */
4230 sizeof(uint32_t) * MAILBOX_EXT_WSIZE))
4238 uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE];