Lines Matching refs:uint32_t
93 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
94 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
141 uint32_t buffer_tag; /* used for tagged queue ring */
153 uint32_t max_count;
154 uint32_t current_count;
162 uint32_t tag;
186 uint32_t status; /* vpd status value */
187 uint32_t length; /* number of bytes actually returned */
189 uint32_t rsvd1; /* Revision numbers */
190 uint32_t biuRev;
191 uint32_t smRev;
192 uint32_t smFwRev;
193 uint32_t endecRev;
199 uint32_t postKernRev;
200 uint32_t opFwRev;
202 uint32_t sli1FwRev;
204 uint32_t sli2FwRev;
209 uint32_t rsvd3 :19; /* Reserved */
210 uint32_t cdss : 1; /* Configure Data Security SLI */
211 uint32_t rsvd2 : 3; /* Reserved */
212 uint32_t cbg : 1; /* Configure BlockGuard */
213 uint32_t cmv : 1; /* Configure Max VPIs */
214 uint32_t ccrp : 1; /* Config Command Ring Polling */
215 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
216 uint32_t chbs : 1; /* Cofigure Host Backing store */
217 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
218 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
219 uint32_t cmx : 1; /* Configure Max XRIs */
220 uint32_t cmr : 1; /* Configure Max RPIs */
222 uint32_t cmr : 1; /* Configure Max RPIs */
223 uint32_t cmx : 1; /* Configure Max XRIs */
224 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
225 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
226 uint32_t chbs : 1; /* Cofigure Host Backing store */
227 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
228 uint32_t ccrp : 1; /* Config Command Ring Polling */
229 uint32_t cmv : 1; /* Configure Max VPIs */
230 uint32_t cbg : 1; /* Configure BlockGuard */
231 uint32_t rsvd2 : 3; /* Reserved */
232 uint32_t cdss : 1; /* Configure Data Security SLI */
233 uint32_t rsvd3 :19; /* Reserved */
246 uint32_t elsLogiCol;
247 uint32_t elsRetryExceeded;
248 uint32_t elsXmitRetry;
249 uint32_t elsDelayRetry;
250 uint32_t elsRcvDrop;
251 uint32_t elsRcvFrame;
252 uint32_t elsRcvRSCN;
253 uint32_t elsRcvRNID;
254 uint32_t elsRcvFARP;
255 uint32_t elsRcvFARPR;
256 uint32_t elsRcvFLOGI;
257 uint32_t elsRcvPLOGI;
258 uint32_t elsRcvADISC;
259 uint32_t elsRcvPDISC;
260 uint32_t elsRcvFAN;
261 uint32_t elsRcvLOGO;
262 uint32_t elsRcvPRLO;
263 uint32_t elsRcvPRLI;
264 uint32_t elsRcvLIRR;
265 uint32_t elsRcvRLS;
266 uint32_t elsRcvRPS;
267 uint32_t elsRcvRPL;
268 uint32_t elsRcvRRQ;
269 uint32_t elsRcvRTV;
270 uint32_t elsRcvECHO;
271 uint32_t elsRcvLCB;
272 uint32_t elsRcvRDP;
273 uint32_t elsXmitFLOGI;
274 uint32_t elsXmitFDISC;
275 uint32_t elsXmitPLOGI;
276 uint32_t elsXmitPRLI;
277 uint32_t elsXmitADISC;
278 uint32_t elsXmitLOGO;
279 uint32_t elsXmitSCR;
280 uint32_t elsXmitRNID;
281 uint32_t elsXmitFARP;
282 uint32_t elsXmitFARPR;
283 uint32_t elsXmitACC;
284 uint32_t elsXmitLSRJT;
286 uint32_t frameRcvBcast;
287 uint32_t frameRcvMulti;
288 uint32_t strayXmitCmpl;
289 uint32_t frameXmitDelay;
290 uint32_t xriCmdCmpl;
291 uint32_t xriStatErr;
292 uint32_t LinkUp;
293 uint32_t LinkDown;
294 uint32_t LinkMultiEvent;
295 uint32_t NoRcvBuf;
296 uint32_t fcpCmd;
297 uint32_t fcpCmpl;
298 uint32_t fcpRspErr;
299 uint32_t fcpRemoteStop;
300 uint32_t fcpPortRjt;
301 uint32_t fcpPortBusy;
302 uint32_t fcpError;
303 uint32_t fcpLocalErr;
352 uint32_t fc_flag; /* FC flags */
380 uint32_t ct_flags;
400 uint32_t fc_myDID; /* fibre channel S_ID */
401 uint32_t fc_prevDID; /* previous fibre channel S_ID */
408 uint32_t num_disc_nodes; /* in addition to hba_state */
409 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
411 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
412 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
413 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
422 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
425 uint32_t work_port_events; /* Timeout to be handled */
447 uint32_t cfg_scan_down;
448 uint32_t cfg_lun_queue_depth;
449 uint32_t cfg_nodev_tmo;
450 uint32_t cfg_devloss_tmo;
451 uint32_t cfg_restrict_login;
452 uint32_t cfg_peer_port_login;
453 uint32_t cfg_fcp_class;
454 uint32_t cfg_use_adisc;
455 uint32_t cfg_discovery_threads;
456 uint32_t cfg_log_verbose;
457 uint32_t cfg_max_luns;
458 uint32_t cfg_enable_da_id;
459 uint32_t cfg_max_scsicmpl_time;
460 uint32_t cfg_tgt_queue_depth;
461 uint32_t cfg_first_burst_size;
462 uint32_t dev_loss_tmo_changed;
480 uint32_t vport_flag;
486 uint32_t fdmi_hba_mask;
487 uint32_t fdmi_port_mask;
492 uint32_t last_fcp_wqidx;
498 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
499 uint32_t hbqPutIdx; /* HBQ slot to use */
500 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
528 uint32_t ctxt_id;
529 uint32_t SID;
530 uint32_t valid;
571 uint32_t state;
579 uint32_t numBuf;
580 uint32_t mbxTag;
581 uint32_t seqNum;
606 (struct lpfc_hba *, uint32_t,
607 struct lpfc_iocbq *, uint32_t);
618 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
623 uint32_t mask);
627 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
631 (struct lpfc_hba *, uint32_t);
637 (struct lpfc_hba *, uint32_t);
639 (struct lpfc_hba *, uint32_t);
654 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
655 uint32_t sli3_options; /* Mask of enabled SLI3 options */
664 uint32_t iocb_cmd_size;
665 uint32_t iocb_rsp_size;
668 uint32_t link_flag; /* link state flags */
677 uint32_t hba_flag; /* hba generic flags */
702 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
706 uint32_t *mbox_ext;
708 uint32_t ha_copy;
718 uint32_t fc_eventTag; /* event tag for link attention */
719 uint32_t link_events;
722 uint32_t fc_pref_DID; /* preferred D_ID */
724 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
725 uint32_t fc_edtov; /* E_D_TOV timer value */
726 uint32_t fc_arbtov; /* ARB_TOV timer value */
727 uint32_t fc_ratov; /* R_A_TOV timer value */
728 uint32_t fc_rttov; /* R_T_TOV timer value */
729 uint32_t fc_altov; /* AL_TOV timer value */
730 uint32_t fc_crtov; /* C_R_TOV timer value */
735 uint32_t lmt;
737 uint32_t fc_topology; /* link topology, from LINK INIT */
738 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
743 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
747 uint32_t RandomData[7];
753 uint32_t initial_imax;
758 uint32_t cfg_ack0;
759 uint32_t cfg_enable_npiv;
760 uint32_t cfg_enable_rrq;
761 uint32_t cfg_topology;
762 uint32_t cfg_link_speed;
765 uint32_t cfg_fcf_failover_policy;
766 uint32_t cfg_fcp_io_sched;
767 uint32_t cfg_fcp2_no_tgt_reset;
768 uint32_t cfg_cr_delay;
769 uint32_t cfg_cr_count;
770 uint32_t cfg_multi_ring_support;
771 uint32_t cfg_multi_ring_rctl;
772 uint32_t cfg_multi_ring_type;
773 uint32_t cfg_poll;
774 uint32_t cfg_poll_tmo;
775 uint32_t cfg_task_mgmt_tmo;
776 uint32_t cfg_use_msi;
777 uint32_t cfg_auto_imax;
778 uint32_t cfg_fcp_imax;
779 uint32_t cfg_fcp_cpu_map;
780 uint32_t cfg_fcp_io_channel;
781 uint32_t cfg_suppress_rsp;
782 uint32_t cfg_nvme_oas;
783 uint32_t cfg_nvme_embed_cmd;
784 uint32_t cfg_nvme_io_channel;
785 uint32_t cfg_nvmet_mrq_post;
786 uint32_t cfg_nvmet_mrq;
787 uint32_t cfg_enable_nvmet;
788 uint32_t cfg_nvme_enable_fb;
789 uint32_t cfg_nvmet_fb_size;
790 uint32_t cfg_total_seg_cnt;
791 uint32_t cfg_sg_seg_cnt;
792 uint32_t cfg_nvme_seg_cnt;
793 uint32_t cfg_sg_dma_buf_size;
796 uint32_t cfg_hba_queue_depth;
797 uint32_t cfg_enable_hba_reset;
798 uint32_t cfg_enable_hba_heartbeat;
799 uint32_t cfg_fof;
800 uint32_t cfg_EnableXLane;
803 uint32_t cfg_oas_lun_state;
806 uint32_t cfg_oas_lun_status;
808 uint32_t cfg_oas_flags;
812 uint32_t cfg_oas_priority;
813 uint32_t cfg_XLanePriority;
814 uint32_t cfg_enable_bg;
815 uint32_t cfg_prot_mask;
816 uint32_t cfg_prot_guard;
817 uint32_t cfg_hostmem_hgp;
818 uint32_t cfg_log_verbose;
819 uint32_t cfg_aer_support;
820 uint32_t cfg_sriov_nr_virtfn;
821 uint32_t cfg_request_firmware_upgrade;
822 uint32_t cfg_iocb_cnt;
823 uint32_t cfg_suppress_link_up;
824 uint32_t cfg_rrq_xri_bitmap_sz;
825 uint32_t cfg_delay_discovery;
826 uint32_t cfg_sli_mode;
830 uint32_t cfg_enable_dss;
831 uint32_t cfg_fdmi_on;
834 uint32_t cfg_enable_SmartSAN;
835 uint32_t cfg_enable_mds_diags;
836 uint32_t cfg_enable_fc4_type;
837 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */
838 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */
839 uint32_t cfg_xri_split;
843 uint32_t cfg_enable_pbde;
844 uint32_t io_channel_irqs; /* number of irqs for io channels */
850 uint32_t work_ha; /* Host Attention Bits for WT */
851 uint32_t work_ha_mask; /* HA Bits owned by WT */
852 uint32_t work_hs; /* HS stored in case of ERRAT */
853 uint32_t work_status[2]; /* Extra status from SLIM */
859 uint32_t hbq_in_use; /* HBQs in use flag */
860 uint32_t hbq_count; /* Count of configured HBQs */
892 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
893 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
914 uint32_t eratt_poll_interval;
933 uint32_t total_scsi_bufs;
938 uint32_t total_nvme_bufs;
939 uint32_t get_nvme_bufs;
940 uint32_t put_nvme_bufs;
942 uint32_t total_iocbq_bufs;
963 uint32_t intr_mode;
1013 uint32_t nvmeio_trc_size;
1014 uint32_t nvmeio_trc_output_idx;
1017 uint32_t lpfc_injerr_wgrd_cnt;
1018 uint32_t lpfc_injerr_wapp_cnt;
1019 uint32_t lpfc_injerr_wref_cnt;
1020 uint32_t lpfc_injerr_rgrd_cnt;
1021 uint32_t lpfc_injerr_rapp_cnt;
1022 uint32_t lpfc_injerr_rref_cnt;
1023 uint32_t lpfc_injerr_nportid;
1066 uint32_t buffer_tag_count;
1074 uint32_t bucket_base;
1075 uint32_t bucket_step;
1080 uint32_t fcoe_eventtag;
1081 uint32_t fcoe_eventtag_at_fcf_scan;
1082 uint32_t fcoe_cvl_eventtag;
1083 uint32_t fcoe_cvl_eventtag_attn;
1093 uint32_t ctx_idx;
1097 uint32_t iocb_cnt;
1098 uint32_t iocb_max;
1120 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT];
1121 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT];
1122 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT];
1123 uint32_t cpucheck_ccmpl_io[LPFC_CHECK_CPU_CNT];
1201 lpfc_readl(void __iomem *addr, uint32_t *data) in lpfc_readl()
1203 uint32_t temp; in lpfc_readl()