Lines Matching defs:sisl_host_map

250 struct sisl_host_map {  struct
251 	__be64 endian_ctrl;	/* Per context Endian Control. The AFU will
256 	__be64 intr_status;	/* this sends LISN# programmed in ctx_ctrl.
286 	__be64 intr_clear;
287 	__be64 intr_mask;
288 	__be64 ioarrin;		/* only write what cmd_room permits */
289 	__be64 rrq_start;	/* start & end are both inclusive */
290 	__be64 rrq_end;		/* write sequence: start followed by end */
291 	__be64 cmd_room;
292 	__be64 ctx_ctrl;	/* least significant byte or b56:63 is LISN# */
295 	__be64 mbox_w;		/* restricted use */
296 	__be64 sq_start;	/* Submission Queue (R/W): write sequence and */
297 	__be64 sq_end;		/* inclusion semantics are the same as RRQ    */
298 	__be64 sq_head;		/* Submission Queue Head (R): for debugging   */
299 	__be64 sq_tail;		/* Submission Queue TAIL (R/W): next IOARCB   */
300 	__be64 sq_ctx_reset;	/* Submission Queue Context Reset (R/W)	      */