Lines Matching refs:host_int_status

305 		writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/  in arcmsr_remap_pciregion()
460 			writel(0, &phbcmu->host_int_status); /*clear interrupt*/  in arcmsr_hbaE_wait_msgint_ready()
636 		reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);  in arcmsr_alloc_io_queue()
1065 		writel(0, &acb->pmuE->host_int_status);  in arcmsr_resume()
1396 …while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOuts…  in arcmsr_done4abort_postqueue()
2279 		writel(0, &reg->host_int_status); /* clear interrupt */  in arcmsr_hbaE_doorbell_isr()
2491 	writel(0, &reg->host_int_status);  in arcmsr_hbaE_message_isr()
2557 	host_interrupt_status = readl(&phbcmu->host_int_status) &  in arcmsr_hbaC_handle_isr()
2568 		host_interrupt_status = readl(&phbcmu->host_int_status);  in arcmsr_hbaC_handle_isr()
2579 	host_interrupt_status = readl(pmu->host_int_status) &  in arcmsr_hbaD_handle_isr()
2592 		host_interrupt_status = readl(pmu->host_int_status);  in arcmsr_hbaD_handle_isr()
2604 	host_interrupt_status = readl(&pmu->host_int_status) &  in arcmsr_hbaE_handle_isr()
2618 		host_interrupt_status = readl(&pmu->host_int_status);  in arcmsr_hbaE_handle_isr()
3355 		if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {  in arcmsr_hbaC_polling_ccbdone()
4084 		writel(0, &reg->host_int_status); /*clear interrupt*/  in arcmsr_clear_doorbell_queue_buffer()
4092 				writel(0, &reg->host_int_status); /*clear interrupt*/  in arcmsr_clear_doorbell_queue_buffer()