1750 		if (acb->cdb_phyaddr_hi32) {  in arcmsr_post_ccb()
1751 			writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);  in arcmsr_post_ccb()
3656 	uint32_t cdb_phyaddr, cdb_phyaddr_hi32;  in arcmsr_iop_confirm()  local
3679 	cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);  in arcmsr_iop_confirm()
3680 	acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;  in arcmsr_iop_confirm()
3689 		if (cdb_phyaddr_hi32 != 0) {  in arcmsr_iop_confirm()
3693 			writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);  in arcmsr_iop_confirm()
3722 		writel(cdb_phyaddr_hi32, rwbuffer++);  in arcmsr_iop_confirm()
3745 		if (cdb_phyaddr_hi32 != 0) {  in arcmsr_iop_confirm()
3749 					acb->adapter_index, cdb_phyaddr_hi32);  in arcmsr_iop_confirm()
3751 			writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);  in arcmsr_iop_confirm()
3769 		writel(cdb_phyaddr_hi32, rwbuffer++);  in arcmsr_iop_confirm()
3787 		writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);  in arcmsr_iop_confirm()
3791 		cdb_phyaddr_hi32 = (uint32_t)((dma_coherent_handle >> 16) >> 16);  in arcmsr_iop_confirm()
3793 		writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[6]);  in arcmsr_iop_confirm()