56 	void __iomem		*reg_base;  member
82 	writel(xrtcdev->calibval, (xrtcdev->reg_base + RTC_CALIB_WR));  in xlnx_rtc_set_time()
84 	writel(new_time, xrtcdev->reg_base + RTC_SET_TM_WR);  in xlnx_rtc_set_time()
94 	writel(RTC_INT_SEC, xrtcdev->reg_base + RTC_INT_STS);  in xlnx_rtc_set_time()
105 	status = readl(xrtcdev->reg_base + RTC_INT_STS);  in xlnx_rtc_read_time()
112 		rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_CUR_TM), tm);  in xlnx_rtc_read_time()
121 		read_time = readl(xrtcdev->reg_base + RTC_SET_TM_RD) - 1;  in xlnx_rtc_read_time()
132 	rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_ALRM), &alrm->time);  in xlnx_rtc_read_alarm()
133 	alrm->enabled = readl(xrtcdev->reg_base + RTC_INT_MASK) & RTC_INT_ALRM;  in xlnx_rtc_read_alarm()
143 		writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_EN);  in xlnx_rtc_alarm_irq_enable()
145 		writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_DIS);  in xlnx_rtc_alarm_irq_enable()
160 	writel((u32)alarm_time, (xrtcdev->reg_base + RTC_ALRM));  in xlnx_rtc_set_alarm()
172 	rtc_ctrl = readl(xrtcdev->reg_base + RTC_CTRL);  in xlnx_init_rtc()
174 	writel(rtc_ctrl, xrtcdev->reg_base + RTC_CTRL);  in xlnx_init_rtc()
183 	writel(xrtcdev->calibval, (xrtcdev->reg_base + RTC_CALIB_WR));  in xlnx_init_rtc()
199 	status = readl(xrtcdev->reg_base + RTC_INT_STS);  in xlnx_rtc_interrupt()
205 	writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_STS);  in xlnx_rtc_interrupt()
227 	xrtcdev->reg_base = devm_ioremap_resource(&pdev->dev, res);  in xlnx_rtc_probe()
228 	if (IS_ERR(xrtcdev->reg_base))  in xlnx_rtc_probe()
229 		return PTR_ERR(xrtcdev->reg_base);  in xlnx_rtc_probe()