102 	iowrite32(data, priv->regs + offset);  in tsi721_lcwrite()
155 	iowrite32(rd_count + 2,	regs + TSI721_DMAC_DWRCNT);  in tsi721_maint_dma()
184 		iowrite32(TSI721_DMAC_INT_ALL, regs + TSI721_DMAC_INT);  in tsi721_maint_dma()
185 		iowrite32(TSI721_DMAC_CTL_INIT, regs + TSI721_DMAC_CTL);  in tsi721_maint_dma()
187 		iowrite32(0, regs + TSI721_DMAC_DWRCNT);  in tsi721_maint_dma()
204 	iowrite32(swr_ptr, regs + TSI721_DMAC_DSRP);  in tsi721_maint_dma()
295 	iowrite32(TSI721_RIO_PW_RX_STAT_PW_DISC | TSI721_RIO_PW_RX_STAT_PW_VAL,  in tsi721_pw_handler()
337 	iowrite32(TSI721_RIO_PW_RX_STAT_PW_DISC | TSI721_RIO_PW_RX_STAT_PW_VAL,  in tsi721_pw_enable()
340 	iowrite32(rval, priv->regs + TSI721_RIO_EM_INT_ENABLE);  in tsi721_pw_enable()
386 	iowrite32(regval,  in tsi721_dbell_handler()
448 	iowrite32(rd_ptr & (IDB_QSIZE - 1),  in tsi721_db_dpc()
454 	iowrite32(regval,  in tsi721_db_dpc()
480 		iowrite32(0, priv->regs + TSI721_DEV_INTE);  in tsi721_irqhandler()
501 			iowrite32(intval,  in tsi721_irqhandler()
518 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
534 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
576 		iowrite32(dev_int, priv->regs + TSI721_DEV_INTE);  in tsi721_irqhandler()
587 	iowrite32(TSI721_SR_CHINT_ALL,  in tsi721_interrupts_init()
589 	iowrite32(TSI721_SR_CHINT_IDBQRCV,  in tsi721_interrupts_init()
593 	iowrite32(TSI721_RIO_EM_DEV_INT_EN_INT,  in tsi721_interrupts_init()
604 	iowrite32(intr,	priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_interrupts_init()
612 	iowrite32(intr, priv->regs + TSI721_DEV_INTE);  in tsi721_interrupts_init()
691 	iowrite32(sr_ch_int, priv->regs + TSI721_SR_CHINT(IDB_QUEUE));  in tsi721_sr2pc_ch_msix()
993 		iowrite32(rval, priv->regs + TSI721_LUT_DATA0);  in tsi721_map_outb_win()
995 		iowrite32(rval, priv->regs + TSI721_LUT_DATA1);  in tsi721_map_outb_win()
997 		iowrite32(rval, priv->regs + TSI721_LUT_DATA2);  in tsi721_map_outb_win()
1000 		iowrite32(rval, priv->regs + TSI721_ZONE_SEL);  in tsi721_map_outb_win()
1005 	iowrite32(TSI721_OBWIN_SIZE(size) << 8,  in tsi721_map_outb_win()
1007 	iowrite32((u32)(ob_win->base >> 32), priv->regs + TSI721_OBWINUB(obw));  in tsi721_map_outb_win()
1008 	iowrite32((u32)(ob_win->base & TSI721_OBWINLB_BA) | TSI721_OBWINLB_WEN,  in tsi721_map_outb_win()
1032 			iowrite32(0, priv->regs + TSI721_OBWINLB(i));  in tsi721_unmap_outb_win()
1054 		iowrite32(0, priv->regs + TSI721_OBWINLB(i));  in tsi721_init_pc2sr_mapping()
1057 	iowrite32(0, priv->regs + TSI721_LUT_DATA0);  in tsi721_init_pc2sr_mapping()
1058 	iowrite32(0, priv->regs + TSI721_LUT_DATA1);  in tsi721_init_pc2sr_mapping()
1059 	iowrite32(0, priv->regs + TSI721_LUT_DATA2);  in tsi721_init_pc2sr_mapping()
1068 			iowrite32(rval, priv->regs + TSI721_ZONE_SEL);  in tsi721_init_pc2sr_mapping()
1224 	iowrite32(TSI721_IBWIN_SIZE(ibw_size) << 8,  in tsi721_rio_map_inb_mem()
1227 	iowrite32(((u64)loc_start >> 32), priv->regs + TSI721_IBWIN_TUA(i));  in tsi721_rio_map_inb_mem()
1228 	iowrite32(((u64)loc_start & TSI721_IBWIN_TLA_ADD),  in tsi721_rio_map_inb_mem()
1231 	iowrite32(ibw_start >> 32, priv->regs + TSI721_IBWIN_UB(i));  in tsi721_rio_map_inb_mem()
1232 	iowrite32((ibw_start & TSI721_IBWIN_LB_BA) | TSI721_IBWIN_LB_WEN,  in tsi721_rio_map_inb_mem()
1296 			iowrite32(0, priv->regs + TSI721_IBWIN_LB(i));  in tsi721_rio_unmap_inb_mem()
1321 		iowrite32(0, priv->regs + TSI721_IBWIN_LB(i));  in tsi721_init_sr2pc_mapping()
1339 			iowrite32(0, priv->regs + TSI721_IBWIN_LB(i));  in tsi721_close_sr2pc_mapping()
1364 	iowrite32(TSI721_RIO_PW_CTL_PWC_REL, priv->regs + TSI721_RIO_PW_CTL);  in tsi721_port_write_init()
1395 	iowrite32(TSI721_IDQ_SIZE_VAL(IDB_QSIZE),  in tsi721_doorbell_init()
1397 	iowrite32(((u64)priv->idb_dma >> 32),  in tsi721_doorbell_init()
1399 	iowrite32(((u64)priv->idb_dma & TSI721_IDQ_BASEL_ADDR),  in tsi721_doorbell_init()
1402 	iowrite32(0, priv->regs + TSI721_IDQ_MASK(IDB_QUEUE));  in tsi721_doorbell_init()
1404 	iowrite32(TSI721_IDQ_INIT, priv->regs + TSI721_IDQ_CTL(IDB_QUEUE));  in tsi721_doorbell_init()
1406 	iowrite32(0, priv->regs + TSI721_IDQ_RP(IDB_QUEUE));  in tsi721_doorbell_init()
1494 	iowrite32(((u64)bd_phys >> 32),	regs + TSI721_DMAC_DPTRH);  in tsi721_bdma_maint_init()
1495 	iowrite32(((u64)bd_phys & TSI721_DMAC_DPTRL_MASK),  in tsi721_bdma_maint_init()
1499 	iowrite32(((u64)sts_phys >> 32), regs + TSI721_DMAC_DSBH);  in tsi721_bdma_maint_init()
1500 	iowrite32(((u64)sts_phys & TSI721_DMAC_DSBL_MASK),  in tsi721_bdma_maint_init()
1502 	iowrite32(TSI721_DMAC_DSSZ_SIZE(sts_size),  in tsi721_bdma_maint_init()
1506 	iowrite32(TSI721_DMAC_INT_ALL, regs + TSI721_DMAC_INT);  in tsi721_bdma_maint_init()
1511 	iowrite32(TSI721_DMAC_CTL_INIT,	regs + TSI721_DMAC_CTL);  in tsi721_bdma_maint_init()
1533 	iowrite32(TSI721_DMAC_CTL_INIT,	regs + TSI721_DMAC_CTL);  in tsi721_bdma_maint_free()
1560 	iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_interrupt_enable()
1564 	iowrite32(rval | inte_mask, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_enable()
1575 	iowrite32(rval | TSI721_INT_IMSG_CHAN(ch),  in tsi721_imsg_interrupt_enable()
1590 	iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_interrupt_disable()
1595 	iowrite32(rval, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_disable()
1607 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_disable()
1621 	iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_interrupt_enable()
1625 	iowrite32(rval | inte_mask, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_enable()
1636 	iowrite32(rval | TSI721_INT_OMSG_CHAN(ch),  in tsi721_omsg_interrupt_enable()
1651 	iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_interrupt_disable()
1656 	iowrite32(rval, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_disable()
1668 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_disable()
1731 	iowrite32(priv->omsg_ring[mbox].wr_count,  in tsi721_add_outb_message()
1792 		iowrite32(srd_ptr, priv->regs + TSI721_OBDMAC_DSRP(ch));  in tsi721_omsg_handler()
1842 		iowrite32(TSI721_OBDMAC_INT_ERROR,  in tsi721_omsg_handler()
1844 		iowrite32(TSI721_OBDMAC_CTL_RETRY_THR | TSI721_OBDMAC_CTL_INIT,  in tsi721_omsg_handler()
1854 		iowrite32(priv->omsg_ring[ch].tx_slot,  in tsi721_omsg_handler()
1862 	iowrite32(omsg_int, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_handler()
1870 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_handler()
1958 	iowrite32(((u64)priv->omsg_ring[mbox].omd_phys >> 32),  in tsi721_open_outb_mbox()
1960 	iowrite32(((u64)priv->omsg_ring[mbox].omd_phys &  in tsi721_open_outb_mbox()
1965 	iowrite32(((u64)priv->omsg_ring[mbox].sts_phys >> 32),  in tsi721_open_outb_mbox()
1967 	iowrite32(((u64)priv->omsg_ring[mbox].sts_phys &  in tsi721_open_outb_mbox()
1970 	iowrite32(TSI721_DMAC_DSSZ_SIZE(priv->omsg_ring[mbox].sts_size),  in tsi721_open_outb_mbox()
2019 	iowrite32(TSI721_OBDMAC_CTL_RETRY_THR | TSI721_OBDMAC_CTL_INIT,  in tsi721_open_outb_mbox()
2146 	iowrite32(imsg_int, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_handler()
2160 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_handler()
2261 		iowrite32((u32)priv->mport.host_deviceid,  in tsi721_open_inb_mbox()
2271 	iowrite32(((u64)priv->imsg_ring[mbox].imfq_phys >> 32),  in tsi721_open_inb_mbox()
2273 	iowrite32(((u64)priv->imsg_ring[mbox].imfq_phys &  in tsi721_open_inb_mbox()
2276 	iowrite32(TSI721_DMAC_DSSZ_SIZE(entries),  in tsi721_open_inb_mbox()
2280 	iowrite32(((u64)priv->imsg_ring[mbox].imd_phys >> 32),  in tsi721_open_inb_mbox()
2282 	iowrite32(((u32)priv->imsg_ring[mbox].imd_phys &  in tsi721_open_inb_mbox()
2285 	iowrite32(TSI721_DMAC_DSSZ_SIZE(entries),  in tsi721_open_inb_mbox()
2323 	iowrite32(TSI721_IBDMAC_CTL_INIT, priv->regs + TSI721_IBDMAC_CTL(ch));  in tsi721_open_inb_mbox()
2327 	iowrite32(entries - 1, priv->regs + TSI721_IBDMAC_FQWP(ch));  in tsi721_open_inb_mbox()
2502 	iowrite32(priv->imsg_ring[mbox].desc_rdptr,  in tsi721_get_inb_message()
2512 	iowrite32(priv->imsg_ring[mbox].fq_wrptr,  in tsi721_get_inb_message()
2528 	iowrite32(0, priv->regs + TSI721_SMSG_ECC_LOG);  in tsi721_messages_init()
2529 	iowrite32(0, priv->regs + TSI721_RETRY_GEN_CNT);  in tsi721_messages_init()
2530 	iowrite32(0, priv->regs + TSI721_RETRY_RX_CNT);  in tsi721_messages_init()
2533 	iowrite32(TSI721_RQRPTO_VAL, priv->regs + TSI721_RQRPTO);  in tsi721_messages_init()
2538 		iowrite32(TSI721_IBDMAC_INT_MASK,  in tsi721_messages_init()
2541 		iowrite32(0, priv->regs + TSI721_IBDMAC_STS(ch));  in tsi721_messages_init()
2543 		iowrite32(TSI721_SMSG_ECC_COR_LOG_MASK,  in tsi721_messages_init()
2545 		iowrite32(TSI721_SMSG_ECC_NCOR_MASK,  in tsi721_messages_init()
2594 	iowrite32(0, priv->regs + TSI721_DEV_INTE);  in tsi721_disable_ints()
2597 	iowrite32(0, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_disable_ints()
2601 		iowrite32(0, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_disable_ints()
2605 		iowrite32(0, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_disable_ints()
2608 	iowrite32(0, priv->regs + TSI721_SMSG_INTE);  in tsi721_disable_ints()
2612 		iowrite32(0,  in tsi721_disable_ints()
2616 	iowrite32(0, priv->regs + TSI721_BDMA_INTE);  in tsi721_disable_ints()
2620 		iowrite32(0, priv->regs + TSI721_SR_CHINTE(ch));  in tsi721_disable_ints()
2623 	iowrite32(0, priv->regs + TSI721_SR2PC_GEN_INTE);  in tsi721_disable_ints()
2626 	iowrite32(0, priv->regs + TSI721_PC2SR_INTE);  in tsi721_disable_ints()
2629 	iowrite32(0, priv->regs + TSI721_I2C_INT_ENABLE);  in tsi721_disable_ints()
2632 	iowrite32(0, priv->regs + TSI721_RIO_EM_INT_ENABLE);  in tsi721_disable_ints()
2633 	iowrite32(0, priv->regs + TSI721_RIO_EM_DEV_INT_EN);  in tsi721_disable_ints()
2723 	iowrite32(ioread32(priv->regs + TSI721_DEVCTL) |  in tsi721_setup_mport()
2728 		iowrite32(RIO_PORT_GEN_HOST | RIO_PORT_GEN_MASTER |  in tsi721_setup_mport()
2732 		iowrite32(0, priv->regs + (0x100 + RIO_PORT_GEN_CTL_CSR));  in tsi721_setup_mport()