78 	*data = ioread32(priv->regs + offset);  in tsi721_lcread()
140 	rd_count = ioread32(regs + TSI721_DMAC_DRDCNT);  in tsi721_maint_dma()
156 	ioread32(regs + TSI721_DMAC_DWRCNT);  in tsi721_maint_dma()
160 	while ((ch_stat = ioread32(regs + TSI721_DMAC_STS))  in tsi721_maint_dma()
203 	swr_ptr = ioread32(regs + TSI721_DMAC_DSWP);  in tsi721_maint_dma()
274 	pw_stat = ioread32(priv->regs + TSI721_RIO_PW_RX_STAT);  in tsi721_pw_handler()
277 		pw_buf[0] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(0));  in tsi721_pw_handler()
278 		pw_buf[1] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(1));  in tsi721_pw_handler()
279 		pw_buf[2] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(2));  in tsi721_pw_handler()
280 		pw_buf[3] = ioread32(priv->regs + TSI721_RIO_PW_RX_CAPT(3));  in tsi721_pw_handler()
329 	rval = ioread32(priv->regs + TSI721_RIO_EM_INT_ENABLE);  in tsi721_pw_enable()
384 	regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));  in tsi721_dbell_handler()
414 	wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;  in tsi721_db_dpc()
415 	rd_ptr = ioread32(priv->regs + TSI721_IDQ_RP(IDB_QUEUE)) % IDB_QSIZE;  in tsi721_db_dpc()
444 		wr_ptr = ioread32(priv->regs +  in tsi721_db_dpc()
452 	regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));  in tsi721_db_dpc()
457 	wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;  in tsi721_db_dpc()
482 	dev_int = ioread32(priv->regs + TSI721_DEV_INT);  in tsi721_irqhandler()
486 	dev_ch_int = ioread32(priv->regs + TSI721_DEV_CHAN_INT);  in tsi721_irqhandler()
492 			intval = ioread32(priv->regs +  in tsi721_irqhandler()
503 			ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE));  in tsi721_irqhandler()
516 			ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
532 			ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
550 		intval = ioread32(priv->regs + TSI721_RIO_EM_INT_STAT);  in tsi721_irqhandler()
613 	ioread32(priv->regs + TSI721_DEV_INTE);  in tsi721_interrupts_init()
664 	srio_int = ioread32(priv->regs + TSI721_RIO_EM_INT_STAT);  in tsi721_srio_msix()
686 	sr_ch_int = ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE));  in tsi721_sr2pc_ch_msix()
693 	sr_ch_int = ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE));  in tsi721_sr2pc_ch_msix()
986 		while (ioread32(priv->regs + TSI721_ZONE_SEL) &  in tsi721_map_outb_win()
1063 			while (ioread32(priv->regs + TSI721_ZONE_SEL) &  in tsi721_init_pc2sr_mapping()
1200 	regval = ioread32(priv->regs + TSI721_IBWIN_LB(i));  in tsi721_rio_map_inb_mem()
1508 	ioread32(regs + TSI721_DMAC_INT);  in tsi721_bdma_maint_init()
1512 	ioread32(regs + TSI721_DMAC_CTL);  in tsi721_bdma_maint_init()
1528 	ch_stat = ioread32(regs + TSI721_DMAC_STS);  in tsi721_bdma_maint_free()
1563 	rval = ioread32(priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_enable()
1574 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_enable()
1593 	rval = ioread32(priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_disable()
1605 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_disable()
1624 	rval = ioread32(priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_enable()
1635 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_enable()
1654 	rval = ioread32(priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_disable()
1666 	rval = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_disable()
1733 	ioread32(priv->regs + TSI721_OBDMAC_DWRCNT(mbox));  in tsi721_add_outb_message()
1757 	omsg_int = ioread32(priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_handler()
1840 			  ioread32(priv->regs + TSI721_OBDMAC_STS(ch)));  in tsi721_omsg_handler()
1846 		ioread32(priv->regs + TSI721_OBDMAC_CTL(ch));  in tsi721_omsg_handler()
1856 		ioread32(priv->regs + TSI721_OBDMAC_DRDCNT(ch));  in tsi721_omsg_handler()
1868 		ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_handler()
2021 	ioread32(priv->regs + TSI721_OBDMAC_DWRCNT(mbox));  in tsi721_open_outb_mbox()
2134 	imsg_int = ioread32(priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_handler()
2158 		ch_inte = ioread32(priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_handler()
2324 	ioread32(priv->regs + TSI721_IBDMAC_CTL(ch));  in tsi721_open_inb_mbox()
2565 	rval = ioread32(priv->regs + 0x100 + RIO_PORT_N_ERR_STS_CSR(0, 0));  in tsi721_query_mport()
2567 		rval = ioread32(priv->regs + 0x100 + RIO_PORT_N_CTL2_CSR(0, 0));  in tsi721_query_mport()
2569 		rval = ioread32(priv->regs + 0x100 + RIO_PORT_N_CTL_CSR(0, 0));  in tsi721_query_mport()
2723 	iowrite32(ioread32(priv->regs + TSI721_DEVCTL) |  in tsi721_setup_mport()