Lines Matching refs:pc

66 	struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip);  in ecap_pwm_config()  local
74 c = pc->clk_rate; in ecap_pwm_config()
83 c = pc->clk_rate; in ecap_pwm_config()
89 pm_runtime_get_sync(pc->chip.dev); in ecap_pwm_config()
91 value = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config()
96 writew(value, pc->mmio_base + ECCTL2); in ecap_pwm_config()
100 writel(duty_cycles, pc->mmio_base + CAP2); in ecap_pwm_config()
101 writel(period_cycles, pc->mmio_base + CAP1); in ecap_pwm_config()
108 writel(duty_cycles, pc->mmio_base + CAP4); in ecap_pwm_config()
109 writel(period_cycles, pc->mmio_base + CAP3); in ecap_pwm_config()
113 value = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config()
116 writew(value, pc->mmio_base + ECCTL2); in ecap_pwm_config()
119 pm_runtime_put_sync(pc->chip.dev); in ecap_pwm_config()
127 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip); in ecap_pwm_set_polarity() local
130 pm_runtime_get_sync(pc->chip.dev); in ecap_pwm_set_polarity()
132 value = readw(pc->mmio_base + ECCTL2); in ecap_pwm_set_polarity()
141 writew(value, pc->mmio_base + ECCTL2); in ecap_pwm_set_polarity()
143 pm_runtime_put_sync(pc->chip.dev); in ecap_pwm_set_polarity()
150 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip); in ecap_pwm_enable() local
154 pm_runtime_get_sync(pc->chip.dev); in ecap_pwm_enable()
160 value = readw(pc->mmio_base + ECCTL2); in ecap_pwm_enable()
162 writew(value, pc->mmio_base + ECCTL2); in ecap_pwm_enable()
169 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip); in ecap_pwm_disable() local
176 value = readw(pc->mmio_base + ECCTL2); in ecap_pwm_disable()
178 writew(value, pc->mmio_base + ECCTL2); in ecap_pwm_disable()
181 pm_runtime_put_sync(pc->chip.dev); in ecap_pwm_disable()
211 struct ecap_pwm_chip *pc; in ecap_pwm_probe() local
216 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); in ecap_pwm_probe()
217 if (!pc) in ecap_pwm_probe()
233 pc->clk_rate = clk_get_rate(clk); in ecap_pwm_probe()
234 if (!pc->clk_rate) { in ecap_pwm_probe()
239 pc->chip.dev = &pdev->dev; in ecap_pwm_probe()
240 pc->chip.ops = &ecap_pwm_ops; in ecap_pwm_probe()
241 pc->chip.of_xlate = of_pwm_xlate_with_flags; in ecap_pwm_probe()
242 pc->chip.of_pwm_n_cells = 3; in ecap_pwm_probe()
243 pc->chip.base = -1; in ecap_pwm_probe()
244 pc->chip.npwm = 1; in ecap_pwm_probe()
247 pc->mmio_base = devm_ioremap_resource(&pdev->dev, r); in ecap_pwm_probe()
248 if (IS_ERR(pc->mmio_base)) in ecap_pwm_probe()
249 return PTR_ERR(pc->mmio_base); in ecap_pwm_probe()
251 ret = pwmchip_add(&pc->chip); in ecap_pwm_probe()
257 platform_set_drvdata(pdev, pc); in ecap_pwm_probe()
265 struct ecap_pwm_chip *pc = platform_get_drvdata(pdev); in ecap_pwm_remove() local
269 return pwmchip_remove(&pc->chip); in ecap_pwm_remove()
273 static void ecap_pwm_save_context(struct ecap_pwm_chip *pc) in ecap_pwm_save_context() argument
275 pm_runtime_get_sync(pc->chip.dev); in ecap_pwm_save_context()
276 pc->ctx.ecctl2 = readw(pc->mmio_base + ECCTL2); in ecap_pwm_save_context()
277 pc->ctx.cap4 = readl(pc->mmio_base + CAP4); in ecap_pwm_save_context()
278 pc->ctx.cap3 = readl(pc->mmio_base + CAP3); in ecap_pwm_save_context()
279 pm_runtime_put_sync(pc->chip.dev); in ecap_pwm_save_context()
282 static void ecap_pwm_restore_context(struct ecap_pwm_chip *pc) in ecap_pwm_restore_context() argument
284 writel(pc->ctx.cap3, pc->mmio_base + CAP3); in ecap_pwm_restore_context()
285 writel(pc->ctx.cap4, pc->mmio_base + CAP4); in ecap_pwm_restore_context()
286 writew(pc->ctx.ecctl2, pc->mmio_base + ECCTL2); in ecap_pwm_restore_context()
291 struct ecap_pwm_chip *pc = dev_get_drvdata(dev); in ecap_pwm_suspend() local
292 struct pwm_device *pwm = pc->chip.pwms; in ecap_pwm_suspend()
294 ecap_pwm_save_context(pc); in ecap_pwm_suspend()
305 struct ecap_pwm_chip *pc = dev_get_drvdata(dev); in ecap_pwm_resume() local
306 struct pwm_device *pwm = pc->chip.pwms; in ecap_pwm_resume()
312 ecap_pwm_restore_context(pc); in ecap_pwm_resume()