Lines Matching refs:imx

62 	struct imx_chip *imx = to_imx_chip(chip);  in imx_pwm_config_v1()  local
81 u32 max = readl(imx->mmio_base + MX1_PWMP); in imx_pwm_config_v1()
83 writel(max - p, imx->mmio_base + MX1_PWMS); in imx_pwm_config_v1()
90 struct imx_chip *imx = to_imx_chip(chip); in imx_pwm_enable_v1() local
94 ret = clk_prepare_enable(imx->clk_per); in imx_pwm_enable_v1()
98 val = readl(imx->mmio_base + MX1_PWMC); in imx_pwm_enable_v1()
100 writel(val, imx->mmio_base + MX1_PWMC); in imx_pwm_enable_v1()
107 struct imx_chip *imx = to_imx_chip(chip); in imx_pwm_disable_v1() local
110 val = readl(imx->mmio_base + MX1_PWMC); in imx_pwm_disable_v1()
112 writel(val, imx->mmio_base + MX1_PWMC); in imx_pwm_disable_v1()
114 clk_disable_unprepare(imx->clk_per); in imx_pwm_disable_v1()
119 struct imx_chip *imx = to_imx_chip(chip); in imx_pwm_sw_reset() local
124 writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); in imx_pwm_sw_reset()
127 cr = readl(imx->mmio_base + MX3_PWMCR); in imx_pwm_sw_reset()
138 struct imx_chip *imx = to_imx_chip(chip); in imx_pwm_wait_fifo_slot() local
144 sr = readl(imx->mmio_base + MX3_PWMSR); in imx_pwm_wait_fifo_slot()
151 sr = readl(imx->mmio_base + MX3_PWMSR); in imx_pwm_wait_fifo_slot()
161 struct imx_chip *imx = to_imx_chip(chip); in imx_pwm_apply_v2() local
170 c = clk_get_rate(imx->clk_per); in imx_pwm_apply_v2()
200 ret = clk_prepare_enable(imx->clk_per); in imx_pwm_apply_v2()
207 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR); in imx_pwm_apply_v2()
208 writel(period_cycles, imx->mmio_base + MX3_PWMPR); in imx_pwm_apply_v2()
218 writel(cr, imx->mmio_base + MX3_PWMCR); in imx_pwm_apply_v2()
220 writel(0, imx->mmio_base + MX3_PWMCR); in imx_pwm_apply_v2()
222 clk_disable_unprepare(imx->clk_per); in imx_pwm_apply_v2()
266 struct imx_chip *imx; in imx_pwm_probe() local
275 imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL); in imx_pwm_probe()
276 if (imx == NULL) in imx_pwm_probe()
279 imx->clk_per = devm_clk_get(&pdev->dev, "per"); in imx_pwm_probe()
280 if (IS_ERR(imx->clk_per)) { in imx_pwm_probe()
282 PTR_ERR(imx->clk_per)); in imx_pwm_probe()
283 return PTR_ERR(imx->clk_per); in imx_pwm_probe()
286 imx->chip.ops = data->ops; in imx_pwm_probe()
287 imx->chip.dev = &pdev->dev; in imx_pwm_probe()
288 imx->chip.base = -1; in imx_pwm_probe()
289 imx->chip.npwm = 1; in imx_pwm_probe()
293 imx->chip.of_xlate = of_pwm_xlate_with_flags; in imx_pwm_probe()
294 imx->chip.of_pwm_n_cells = 3; in imx_pwm_probe()
298 imx->mmio_base = devm_ioremap_resource(&pdev->dev, r); in imx_pwm_probe()
299 if (IS_ERR(imx->mmio_base)) in imx_pwm_probe()
300 return PTR_ERR(imx->mmio_base); in imx_pwm_probe()
302 ret = pwmchip_add(&imx->chip); in imx_pwm_probe()
306 platform_set_drvdata(pdev, imx); in imx_pwm_probe()
312 struct imx_chip *imx; in imx_pwm_remove() local
314 imx = platform_get_drvdata(pdev); in imx_pwm_remove()
315 if (imx == NULL) in imx_pwm_remove()
318 return pwmchip_remove(&imx->chip); in imx_pwm_remove()