Lines Matching refs:msrs
169 int msrs[RAPL_DOMAIN_MSR_MAX]; member
652 rd->msrs[0] = MSR_PKG_POWER_LIMIT; in rapl_init_domains()
653 rd->msrs[1] = MSR_PKG_ENERGY_STATUS; in rapl_init_domains()
654 rd->msrs[2] = MSR_PKG_PERF_STATUS; in rapl_init_domains()
655 rd->msrs[3] = 0; in rapl_init_domains()
656 rd->msrs[4] = MSR_PKG_POWER_INFO; in rapl_init_domains()
665 rd->msrs[0] = MSR_PP0_POWER_LIMIT; in rapl_init_domains()
666 rd->msrs[1] = MSR_PP0_ENERGY_STATUS; in rapl_init_domains()
667 rd->msrs[2] = 0; in rapl_init_domains()
668 rd->msrs[3] = MSR_PP0_POLICY; in rapl_init_domains()
669 rd->msrs[4] = 0; in rapl_init_domains()
676 rd->msrs[0] = MSR_PP1_POWER_LIMIT; in rapl_init_domains()
677 rd->msrs[1] = MSR_PP1_ENERGY_STATUS; in rapl_init_domains()
678 rd->msrs[2] = 0; in rapl_init_domains()
679 rd->msrs[3] = MSR_PP1_POLICY; in rapl_init_domains()
680 rd->msrs[4] = 0; in rapl_init_domains()
687 rd->msrs[0] = MSR_DRAM_POWER_LIMIT; in rapl_init_domains()
688 rd->msrs[1] = MSR_DRAM_ENERGY_STATUS; in rapl_init_domains()
689 rd->msrs[2] = MSR_DRAM_PERF_STATUS; in rapl_init_domains()
690 rd->msrs[3] = 0; in rapl_init_domains()
691 rd->msrs[4] = MSR_DRAM_POWER_INFO; in rapl_init_domains()
808 msr = rd->msrs[rp->id]; in rapl_read_data_raw()
884 ma.msr_no = rd->msrs[rp->id]; in rapl_write_data_raw()
1302 rd->msrs[0] = MSR_PLATFORM_POWER_LIMIT; in rapl_register_psys()
1303 rd->msrs[1] = MSR_PLATFORM_ENERGY_STATUS; in rapl_register_psys()