Lines Matching refs:ipcdev
147 } ipcdev; variable
173 ipcdev.cmd = cmd; in ipc_send_command()
174 if (ipcdev.irq_mode) { in ipc_send_command()
175 reinit_completion(&ipcdev.cmd_complete); in ipc_send_command()
178 writel(cmd, ipcdev.ipc_base + IPC_CMD); in ipc_send_command()
183 return readl(ipcdev.ipc_base + IPC_STATUS); in ipc_read_status()
188 writel(data, ipcdev.ipc_base + IPC_WRITE_BUFFER + offset); in ipc_data_writel()
193 return readb(ipcdev.ipc_base + IPC_READ_BUFFER + offset); in ipc_data_readb()
198 return readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset); in ipc_data_readl()
203 return readq(ipcdev.gcr_mem_base + offset); in gcr_data_readq()
208 if (!ipcdev.has_gcr_regs) in is_gcr_valid()
230 spin_lock(&ipcdev.gcr_lock); in intel_pmc_gcr_read()
234 spin_unlock(&ipcdev.gcr_lock); in intel_pmc_gcr_read()
238 *data = readl(ipcdev.gcr_mem_base + offset); in intel_pmc_gcr_read()
240 spin_unlock(&ipcdev.gcr_lock); in intel_pmc_gcr_read()
259 spin_lock(&ipcdev.gcr_lock); in intel_pmc_gcr_read64()
263 spin_unlock(&ipcdev.gcr_lock); in intel_pmc_gcr_read64()
267 *data = readq(ipcdev.gcr_mem_base + offset); in intel_pmc_gcr_read64()
269 spin_unlock(&ipcdev.gcr_lock); in intel_pmc_gcr_read64()
289 spin_lock(&ipcdev.gcr_lock); in intel_pmc_gcr_write()
293 spin_unlock(&ipcdev.gcr_lock); in intel_pmc_gcr_write()
297 writel(data, ipcdev.gcr_mem_base + offset); in intel_pmc_gcr_write()
299 spin_unlock(&ipcdev.gcr_lock); in intel_pmc_gcr_write()
321 spin_lock(&ipcdev.gcr_lock); in intel_pmc_gcr_update()
327 new_val = readl(ipcdev.gcr_mem_base + offset); in intel_pmc_gcr_update()
332 writel(new_val, ipcdev.gcr_mem_base + offset); in intel_pmc_gcr_update()
334 new_val = readl(ipcdev.gcr_mem_base + offset); in intel_pmc_gcr_update()
343 spin_unlock(&ipcdev.gcr_lock); in intel_pmc_gcr_update()
361 if (ipcdev.irq_mode) { in intel_pmc_ipc_check_status()
363 &ipcdev.cmd_complete, IPC_MAX_SEC * HZ)) in intel_pmc_ipc_check_status()
376 dev_err(ipcdev.dev, in intel_pmc_ipc_check_status()
378 status, ipcdev.cmd); in intel_pmc_ipc_check_status()
388 dev_err(ipcdev.dev, in intel_pmc_ipc_check_status()
390 ipc_err_sources[i], status, ipcdev.cmd); in intel_pmc_ipc_check_status()
392 dev_err(ipcdev.dev, in intel_pmc_ipc_check_status()
394 status, ipcdev.cmd); in intel_pmc_ipc_check_status()
417 if (ipcdev.dev == NULL) { in intel_pmc_ipc_simple_command()
455 if (ipcdev.dev == NULL) { in intel_pmc_ipc_raw_cmd()
460 writel(dptr, ipcdev.ipc_base + IPC_DPTR); in intel_pmc_ipc_raw_cmd()
461 writel(sptr, ipcdev.ipc_base + IPC_SPTR); in intel_pmc_ipc_raw_cmd()
503 if (ipcdev.irq_mode) { in ioc()
505 writel(status | IPC_STATUS_IRQ, ipcdev.ipc_base + IPC_STATUS); in ioc()
507 complete(&ipcdev.cmd_complete); in ioc()
514 struct intel_pmc_ipc_dev *pmc = &ipcdev; in ipc_pci_probe()
523 spin_lock_init(&ipcdev.gcr_lock); in ipc_pci_probe()
666 .no_reboot_priv = &ipcdev,
686 .parent = ipcdev.dev, in ipc_create_punit_device()
697 ipcdev.punit_dev = pdev; in ipc_create_punit_device()
707 .parent = ipcdev.dev, in ipc_create_tco_device()
717 res->start = ipcdev.acpi_io_base + TCO_BASE_OFFSET; in ipc_create_tco_device()
721 res->start = ipcdev.acpi_io_base + SMI_EN_OFFSET; in ipc_create_tco_device()
728 ipcdev.tco_dev = pdev; in ipc_create_tco_device()
738 .parent = ipcdev.dev, in ipc_create_telemetry_device()
746 res->start = ipcdev.telem_punit_ssram_base; in ipc_create_telemetry_device()
747 res->end = res->start + ipcdev.telem_punit_ssram_size - 1; in ipc_create_telemetry_device()
750 res->start = ipcdev.telem_pmc_ssram_base; in ipc_create_telemetry_device()
751 res->end = res->start + ipcdev.telem_pmc_ssram_size - 1; in ipc_create_telemetry_device()
757 ipcdev.telemetry_dev = pdev; in ipc_create_telemetry_device()
770 dev_err(ipcdev.dev, "Failed to add tco platform device\n"); in ipc_create_pmc_devices()
777 dev_err(ipcdev.dev, "Failed to add punit platform device\n"); in ipc_create_pmc_devices()
778 platform_device_unregister(ipcdev.tco_dev); in ipc_create_pmc_devices()
781 if (!ipcdev.telem_res_inval) { in ipc_create_pmc_devices()
784 dev_warn(ipcdev.dev, in ipc_create_pmc_devices()
804 ipcdev.acpi_io_base = res->start; in ipc_plat_get_res()
805 ipcdev.acpi_io_size = size; in ipc_plat_get_res()
878 ipcdev.ipc_base = addr; in ipc_plat_get_res()
880 ipcdev.gcr_mem_base = addr + PLAT_RESOURCE_GCR_OFFSET; in ipc_plat_get_res()
883 ipcdev.telem_res_inval = 0; in ipc_plat_get_res()
888 ipcdev.telem_res_inval = 1; in ipc_plat_get_res()
890 ipcdev.telem_punit_ssram_base = res->start + in ipc_plat_get_res()
892 ipcdev.telem_punit_ssram_size = TELEM_SSRAM_SIZE; in ipc_plat_get_res()
893 ipcdev.telem_pmc_ssram_base = res->start + in ipc_plat_get_res()
895 ipcdev.telem_pmc_ssram_size = TELEM_SSRAM_SIZE; in ipc_plat_get_res()
912 if (!ipcdev.has_gcr_regs) in intel_pmc_s0ix_counter_read()
936 ipcdev.dev = &pdev->dev; in ipc_plat_probe()
937 ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ; in ipc_plat_probe()
938 init_completion(&ipcdev.cmd_complete); in ipc_plat_probe()
939 spin_lock_init(&ipcdev.gcr_lock); in ipc_plat_probe()
941 ipcdev.irq = platform_get_irq(pdev, 0); in ipc_plat_probe()
942 if (ipcdev.irq < 0) { in ipc_plat_probe()
959 if (devm_request_irq(&pdev->dev, ipcdev.irq, ioc, IRQF_NO_SUSPEND, in ipc_plat_probe()
960 "intel_pmc_ipc", &ipcdev)) { in ipc_plat_probe()
973 ipcdev.has_gcr_regs = true; in ipc_plat_probe()
977 devm_free_irq(&pdev->dev, ipcdev.irq, &ipcdev); in ipc_plat_probe()
979 platform_device_unregister(ipcdev.tco_dev); in ipc_plat_probe()
980 platform_device_unregister(ipcdev.punit_dev); in ipc_plat_probe()
981 platform_device_unregister(ipcdev.telemetry_dev); in ipc_plat_probe()
989 devm_free_irq(&pdev->dev, ipcdev.irq, &ipcdev); in ipc_plat_remove()
990 platform_device_unregister(ipcdev.tco_dev); in ipc_plat_remove()
991 platform_device_unregister(ipcdev.punit_dev); in ipc_plat_remove()
992 platform_device_unregister(ipcdev.telemetry_dev); in ipc_plat_remove()
993 ipcdev.dev = NULL; in ipc_plat_remove()