411 sirfsoc_gpio_to_bank(struct sirfsoc_gpio_chip *sgpio, unsigned int offset)  in sirfsoc_gpio_to_bank()  argument
413 	return &sgpio->sgpio_bank[offset / SIRFSOC_GPIO_BANK_SIZE];  in sirfsoc_gpio_to_bank()
424 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_irq_ack()  local
425 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_ack()
432 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_irq_ack()
434 	val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_ack()
436 	writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_ack()
438 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_irq_ack()
441 static void __sirfsoc_gpio_irq_mask(struct sirfsoc_gpio_chip *sgpio,  in __sirfsoc_gpio_irq_mask()  argument
450 	spin_lock_irqsave(&sgpio->lock, flags);  in __sirfsoc_gpio_irq_mask()
452 	val = readl(sgpio->chip.regs + offset);  in __sirfsoc_gpio_irq_mask()
455 	writel(val, sgpio->chip.regs + offset);  in __sirfsoc_gpio_irq_mask()
457 	spin_unlock_irqrestore(&sgpio->lock, flags);  in __sirfsoc_gpio_irq_mask()
463 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_irq_mask()  local
464 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_mask()
466 	__sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE);  in sirfsoc_gpio_irq_mask()
472 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_irq_unmask()  local
473 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_unmask()
480 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_irq_unmask()
482 	val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_unmask()
485 	writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_unmask()
487 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_irq_unmask()
493 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_irq_type()  local
494 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq);  in sirfsoc_gpio_irq_type()
501 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_irq_type()
503 	val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_type()
536 	writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_irq_type()
538 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_irq_type()
555 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(gc);  in sirfsoc_gpio_handle_irq()  local
563 		bank = &sgpio->sgpio_bank[i];  in sirfsoc_gpio_handle_irq()
571 	status = readl(sgpio->chip.regs + SIRFSOC_GPIO_INT_STATUS(bank->id));  in sirfsoc_gpio_handle_irq()
581 		ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, idx));  in sirfsoc_gpio_handle_irq()
601 static inline void sirfsoc_gpio_set_input(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_input()  argument
606 	val = readl(sgpio->chip.regs + ctrl_offset);  in sirfsoc_gpio_set_input()
608 	writel(val, sgpio->chip.regs + ctrl_offset);  in sirfsoc_gpio_set_input()
613 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_request()  local
614 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_request()
626 	sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_request()
627 	__sirfsoc_gpio_irq_mask(sgpio, bank, offset);  in sirfsoc_gpio_request()
636 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_free()  local
637 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_free()
642 	__sirfsoc_gpio_irq_mask(sgpio, bank, offset);  in sirfsoc_gpio_free()
643 	sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_free()
652 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_direction_input()  local
653 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio);  in sirfsoc_gpio_direction_input()
662 	sirfsoc_gpio_set_input(sgpio, offset);  in sirfsoc_gpio_direction_input()
669 static inline void sirfsoc_gpio_set_output(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_output()  argument
679 	out_ctrl = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_set_output()
687 	writel(out_ctrl, sgpio->chip.regs + offset);  in sirfsoc_gpio_set_output()
695 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_direction_output()  local
696 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio);  in sirfsoc_gpio_direction_output()
703 	spin_lock_irqsave(&sgpio->lock, flags);  in sirfsoc_gpio_direction_output()
705 	sirfsoc_gpio_set_output(sgpio, bank, offset, value);  in sirfsoc_gpio_direction_output()
707 	spin_unlock_irqrestore(&sgpio->lock, flags);  in sirfsoc_gpio_direction_output()
714 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_get_value()  local
715 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_get_value()
721 	val = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_get_value()
731 	struct sirfsoc_gpio_chip *sgpio = gpiochip_get_data(chip);  in sirfsoc_gpio_set_value()  local
732 	struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset);  in sirfsoc_gpio_set_value()
738 	ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_set_value()
743 	writel(ctrl, sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset));  in sirfsoc_gpio_set_value()
748 static void sirfsoc_gpio_set_pullup(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_pullup()  argument
757 			u32 val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pullup()
760 			writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pullup()
765 static void sirfsoc_gpio_set_pulldown(struct sirfsoc_gpio_chip *sgpio,  in sirfsoc_gpio_set_pulldown()  argument
774 			u32 val = readl(sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pulldown()
777 			writel(val, sgpio->chip.regs + offset);  in sirfsoc_gpio_set_pulldown()
785 	static struct sirfsoc_gpio_chip *sgpio;  in sirfsoc_gpio_probe()  local
796 	sgpio = devm_kzalloc(&pdev->dev, sizeof(*sgpio), GFP_KERNEL);  in sirfsoc_gpio_probe()
797 	if (!sgpio)  in sirfsoc_gpio_probe()
799 	spin_lock_init(&sgpio->lock);  in sirfsoc_gpio_probe()
805 	sgpio->chip.gc.request = sirfsoc_gpio_request;  in sirfsoc_gpio_probe()
806 	sgpio->chip.gc.free = sirfsoc_gpio_free;  in sirfsoc_gpio_probe()
807 	sgpio->chip.gc.direction_input = sirfsoc_gpio_direction_input;  in sirfsoc_gpio_probe()
808 	sgpio->chip.gc.get = sirfsoc_gpio_get_value;  in sirfsoc_gpio_probe()
809 	sgpio->chip.gc.direction_output = sirfsoc_gpio_direction_output;  in sirfsoc_gpio_probe()
810 	sgpio->chip.gc.set = sirfsoc_gpio_set_value;  in sirfsoc_gpio_probe()
811 	sgpio->chip.gc.base = 0;  in sirfsoc_gpio_probe()
812 	sgpio->chip.gc.ngpio = SIRFSOC_GPIO_BANK_SIZE * SIRFSOC_GPIO_NO_OF_BANKS;  in sirfsoc_gpio_probe()
813 	sgpio->chip.gc.label = kasprintf(GFP_KERNEL, "%pOF", np);  in sirfsoc_gpio_probe()
814 	sgpio->chip.gc.of_node = np;  in sirfsoc_gpio_probe()
815 	sgpio->chip.gc.of_xlate = sirfsoc_gpio_of_xlate;  in sirfsoc_gpio_probe()
816 	sgpio->chip.gc.of_gpio_n_cells = 2;  in sirfsoc_gpio_probe()
817 	sgpio->chip.gc.parent = &pdev->dev;  in sirfsoc_gpio_probe()
818 	sgpio->chip.regs = regs;  in sirfsoc_gpio_probe()
820 	err = gpiochip_add_data(&sgpio->chip.gc, sgpio);  in sirfsoc_gpio_probe()
827 	err =  gpiochip_irqchip_add(&sgpio->chip.gc,  in sirfsoc_gpio_probe()
838 		bank = &sgpio->sgpio_bank[i];  in sirfsoc_gpio_probe()
846 		gpiochip_set_chained_irqchip(&sgpio->chip.gc,  in sirfsoc_gpio_probe()
852 	err = gpiochip_add_pin_range(&sgpio->chip.gc, dev_name(&pdev->dev),  in sirfsoc_gpio_probe()
862 		sirfsoc_gpio_set_pullup(sgpio, pullups);  in sirfsoc_gpio_probe()
866 		sirfsoc_gpio_set_pulldown(sgpio, pulldowns);  in sirfsoc_gpio_probe()
872 	gpiochip_remove(&sgpio->chip.gc);  in sirfsoc_gpio_probe()