39 	struct sh_pfc *pfc;  member
53 	return pmx->pfc->info->nr_groups;  in sh_pfc_get_groups_count()
61 	return pmx->pfc->info->groups[selector].name;  in sh_pfc_get_group_name()
69 	*pins = pmx->pfc->info->groups[selector].pins;  in sh_pfc_get_group_pins()
70 	*num_pins = pmx->pfc->info->groups[selector].nr_pins;  in sh_pfc_get_group_pins()
109 	struct device *dev = pmx->pfc->dev;  in sh_pfc_dt_subnode_to_map()
264 	struct device *dev = pmx->pfc->dev;  in sh_pfc_dt_node_to_map()
319 	return pmx->pfc->info->nr_functions;  in sh_pfc_get_functions_count()
327 	return pmx->pfc->info->functions[selector].name;  in sh_pfc_get_function_name()
337 	*groups = pmx->pfc->info->functions[selector].groups;  in sh_pfc_get_function_groups()
338 	*num_groups = pmx->pfc->info->functions[selector].nr_groups;  in sh_pfc_get_function_groups()
347 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_func_set_mux()  local
348 	const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];  in sh_pfc_func_set_mux()
353 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_func_set_mux()
356 		int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);  in sh_pfc_func_set_mux()
366 		ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);  in sh_pfc_func_set_mux()
372 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_func_set_mux()
381 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_gpio_request_enable()  local
382 	int idx = sh_pfc_get_pin_index(pfc, offset);  in sh_pfc_gpio_request_enable()
387 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_gpio_request_enable()
390 		dev_err(pfc->dev,  in sh_pfc_gpio_request_enable()
397 	if (!pfc->gpio) {  in sh_pfc_gpio_request_enable()
401 		const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_gpio_request_enable()
403 		ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);  in sh_pfc_gpio_request_enable()
413 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_gpio_request_enable()
423 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_gpio_disable_free()  local
424 	int idx = sh_pfc_get_pin_index(pfc, offset);  in sh_pfc_gpio_disable_free()
428 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_gpio_disable_free()
430 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_gpio_disable_free()
438 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_gpio_set_direction()  local
440 	int idx = sh_pfc_get_pin_index(pfc, offset);  in sh_pfc_gpio_set_direction()
441 	const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_gpio_set_direction()
456 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_gpio_set_direction()
458 	ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);  in sh_pfc_gpio_set_direction()
465 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_gpio_set_direction()
479 static u32 sh_pfc_pinconf_find_drive_strength_reg(struct sh_pfc *pfc,  in sh_pfc_pinconf_find_drive_strength_reg()  argument
486 	for (reg = pfc->info->drive_regs; reg->reg; ++reg) {  in sh_pfc_pinconf_find_drive_strength_reg()
502 static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc,  in sh_pfc_pinconf_get_drive_strength()  argument
511 	reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);  in sh_pfc_pinconf_get_drive_strength()
515 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_get_drive_strength()
516 	val = sh_pfc_read(pfc, reg);  in sh_pfc_pinconf_get_drive_strength()
517 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_get_drive_strength()
527 static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc,  in sh_pfc_pinconf_set_drive_strength()  argument
537 	reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);  in sh_pfc_pinconf_set_drive_strength()
551 	spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_set_drive_strength()
553 	val = sh_pfc_read(pfc, reg);  in sh_pfc_pinconf_set_drive_strength()
557 	sh_pfc_write(pfc, reg, val);  in sh_pfc_pinconf_set_drive_strength()
559 	spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_set_drive_strength()
565 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,  in sh_pfc_pinconf_validate()  argument
568 	int idx = sh_pfc_get_pin_index(pfc, _pin);  in sh_pfc_pinconf_validate()
569 	const struct sh_pfc_pin *pin = &pfc->info->pins[idx];  in sh_pfc_pinconf_validate()
597 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_pinconf_get()  local
602 	if (!sh_pfc_pinconf_validate(pfc, _pin, param))  in sh_pfc_pinconf_get()
611 		if (!pfc->info->ops || !pfc->info->ops->get_bias)  in sh_pfc_pinconf_get()
614 		spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_get()
615 		bias = pfc->info->ops->get_bias(pfc, _pin);  in sh_pfc_pinconf_get()
616 		spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_get()
628 		ret = sh_pfc_pinconf_get_drive_strength(pfc, _pin);  in sh_pfc_pinconf_get()
640 		if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)  in sh_pfc_pinconf_get()
643 		bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);  in sh_pfc_pinconf_get()
647 		spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_get()
648 		val = sh_pfc_read(pfc, pocctrl);  in sh_pfc_pinconf_get()
649 		spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_get()
667 	struct sh_pfc *pfc = pmx->pfc;  in sh_pfc_pinconf_set()  local
675 		if (!sh_pfc_pinconf_validate(pfc, _pin, param))  in sh_pfc_pinconf_set()
682 			if (!pfc->info->ops || !pfc->info->ops->set_bias)  in sh_pfc_pinconf_set()
685 			spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_set()
686 			pfc->info->ops->set_bias(pfc, _pin, param);  in sh_pfc_pinconf_set()
687 			spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_set()
696 			ret = sh_pfc_pinconf_set_drive_strength(pfc, _pin, arg);  in sh_pfc_pinconf_set()
708 			if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)  in sh_pfc_pinconf_set()
711 			bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);  in sh_pfc_pinconf_set()
718 			spin_lock_irqsave(&pfc->lock, flags);  in sh_pfc_pinconf_set()
719 			val = sh_pfc_read(pfc, pocctrl);  in sh_pfc_pinconf_set()
724 			sh_pfc_write(pfc, pocctrl, val);  in sh_pfc_pinconf_set()
725 			spin_unlock_irqrestore(&pfc->lock, flags);  in sh_pfc_pinconf_set()
747 	pins = pmx->pfc->info->groups[group].pins;  in sh_pfc_pinconf_group_set()
748 	num_pins = pmx->pfc->info->groups[group].nr_pins;  in sh_pfc_pinconf_group_set()
768 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)  in sh_pfc_map_pins()  argument
773 	pmx->pins = devm_kcalloc(pfc->dev,  in sh_pfc_map_pins()
774 				 pfc->info->nr_pins, sizeof(*pmx->pins),  in sh_pfc_map_pins()
779 	pmx->configs = devm_kcalloc(pfc->dev,  in sh_pfc_map_pins()
780 				    pfc->info->nr_pins, sizeof(*pmx->configs),  in sh_pfc_map_pins()
785 	for (i = 0; i < pfc->info->nr_pins; ++i) {  in sh_pfc_map_pins()
786 		const struct sh_pfc_pin *info = &pfc->info->pins[i];  in sh_pfc_map_pins()
799 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)  in sh_pfc_register_pinctrl()  argument
804 	pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);  in sh_pfc_register_pinctrl()
808 	pmx->pfc = pfc;  in sh_pfc_register_pinctrl()
810 	ret = sh_pfc_map_pins(pfc, pmx);  in sh_pfc_register_pinctrl()
820 	pmx->pctl_desc.npins = pfc->info->nr_pins;  in sh_pfc_register_pinctrl()
822 	ret = devm_pinctrl_register_and_init(pfc->dev, &pmx->pctl_desc, pmx,  in sh_pfc_register_pinctrl()
825 		dev_err(pfc->dev, "could not register: %i\n", ret);  in sh_pfc_register_pinctrl()