Lines Matching refs:GRP_MUX
78 #define GRP_MUX(a, m, p) \ macro
242 GRP_MUX("exin0", EXIN, pins_exin0),
243 GRP_MUX("exin1", EXIN, pins_exin1),
244 GRP_MUX("exin2", EXIN, pins_exin2),
245 GRP_MUX("jtag", JTAG, pins_jtag),
246 GRP_MUX("ebu a23", EBU, pins_ebu_a23),
247 GRP_MUX("ebu a24", EBU, pins_ebu_a24),
248 GRP_MUX("ebu a25", EBU, pins_ebu_a25),
249 GRP_MUX("ebu clk", EBU, pins_ebu_clk),
250 GRP_MUX("ebu cs1", EBU, pins_ebu_cs1),
251 GRP_MUX("ebu wait", EBU, pins_ebu_wait),
252 GRP_MUX("nand ale", EBU, pins_nand_ale),
253 GRP_MUX("nand cs1", EBU, pins_nand_cs1),
254 GRP_MUX("nand cle", EBU, pins_nand_cle),
255 GRP_MUX("spi", SPI, pins_spi),
256 GRP_MUX("spi_cs1", SPI, pins_spi_cs1),
257 GRP_MUX("spi_cs2", SPI, pins_spi_cs2),
258 GRP_MUX("spi_cs3", SPI, pins_spi_cs3),
259 GRP_MUX("spi_cs4", SPI, pins_spi_cs4),
260 GRP_MUX("spi_cs5", SPI, pins_spi_cs5),
261 GRP_MUX("spi_cs6", SPI, pins_spi_cs6),
262 GRP_MUX("asc0", ASC, pins_asc0),
263 GRP_MUX("asc0 cts rts", ASC, pins_asc0_cts_rts),
264 GRP_MUX("stp", STP, pins_stp),
265 GRP_MUX("nmi", NMI, pins_nmi),
266 GRP_MUX("gpt1", GPT, pins_gpt1),
267 GRP_MUX("gpt2", GPT, pins_gpt2),
268 GRP_MUX("gpt3", GPT, pins_gpt3),
269 GRP_MUX("clkout0", CGU, pins_clkout0),
270 GRP_MUX("clkout1", CGU, pins_clkout1),
271 GRP_MUX("clkout2", CGU, pins_clkout2),
272 GRP_MUX("clkout3", CGU, pins_clkout3),
273 GRP_MUX("gnt1", PCI, pins_pci_gnt1),
274 GRP_MUX("gnt2", PCI, pins_pci_gnt2),
275 GRP_MUX("gnt3", PCI, pins_pci_gnt3),
276 GRP_MUX("req1", PCI, pins_pci_req1),
277 GRP_MUX("req2", PCI, pins_pci_req2),
278 GRP_MUX("req3", PCI, pins_pci_req3),
280 GRP_MUX("nand rdy", EBU, pins_nand_rdy),
281 GRP_MUX("nand rd", EBU, pins_nand_rd),
282 GRP_MUX("exin3", EXIN, pins_exin3),
283 GRP_MUX("exin4", EXIN, pins_exin4),
284 GRP_MUX("exin5", EXIN, pins_exin5),
285 GRP_MUX("gnt4", PCI, pins_pci_gnt4),
286 GRP_MUX("req4", PCI, pins_pci_gnt4),
287 GRP_MUX("mdio", MDIO, pins_mdio),
288 GRP_MUX("gphy0 led0", GPHY, pins_gphy0_led0),
289 GRP_MUX("gphy0 led1", GPHY, pins_gphy0_led1),
290 GRP_MUX("gphy0 led2", GPHY, pins_gphy0_led2),
291 GRP_MUX("gphy1 led0", GPHY, pins_gphy1_led0),
292 GRP_MUX("gphy1 led1", GPHY, pins_gphy1_led1),
293 GRP_MUX("gphy1 led2", GPHY, pins_gphy1_led2),
422 GRP_MUX("exin0", EXIN, ase_pins_exin0),
423 GRP_MUX("exin1", EXIN, ase_pins_exin1),
424 GRP_MUX("exin2", EXIN, ase_pins_exin2),
425 GRP_MUX("jtag", JTAG, ase_pins_jtag),
426 GRP_MUX("spi", SPI, ase_pins_spi), /* DEPRECATED */
427 GRP_MUX("spi_di", SPI, ase_pins_spi_di),
428 GRP_MUX("spi_do", SPI, ase_pins_spi_do),
429 GRP_MUX("spi_clk", SPI, ase_pins_spi_clk),
430 GRP_MUX("spi_cs1", SPI, ase_pins_spi_cs1),
431 GRP_MUX("spi_cs2", SPI, ase_pins_spi_cs2),
432 GRP_MUX("spi_cs3", SPI, ase_pins_spi_cs3),
433 GRP_MUX("asc", ASC, ase_pins_asc),
434 GRP_MUX("stp", STP, ase_pins_stp),
435 GRP_MUX("gpt1", GPT, ase_pins_gpt1),
436 GRP_MUX("gpt2", GPT, ase_pins_gpt2),
437 GRP_MUX("gpt3", GPT, ase_pins_gpt3),
438 GRP_MUX("clkout0", CGU, ase_pins_clkout0),
439 GRP_MUX("clkout1", CGU, ase_pins_clkout1),
440 GRP_MUX("clkout2", CGU, ase_pins_clkout2),
441 GRP_MUX("mdio", MDIO, ase_pins_mdio),
442 GRP_MUX("dfe led0", DFE, ase_pins_dfe_led0),
443 GRP_MUX("dfe led1", DFE, ase_pins_dfe_led1),
444 GRP_MUX("ephy led0", EPHY, ase_pins_ephy_led0),
445 GRP_MUX("ephy led1", EPHY, ase_pins_ephy_led1),
446 GRP_MUX("ephy led2", EPHY, ase_pins_ephy_led2),
571 GRP_MUX("exin0", EXIN, danube_pins_exin0),
572 GRP_MUX("exin1", EXIN, danube_pins_exin1),
573 GRP_MUX("exin2", EXIN, danube_pins_exin2),
574 GRP_MUX("jtag", JTAG, danube_pins_jtag),
575 GRP_MUX("ebu a23", EBU, danube_pins_ebu_a23),
576 GRP_MUX("ebu a24", EBU, danube_pins_ebu_a24),
577 GRP_MUX("ebu a25", EBU, danube_pins_ebu_a25),
578 GRP_MUX("ebu clk", EBU, danube_pins_ebu_clk),
579 GRP_MUX("ebu cs1", EBU, danube_pins_ebu_cs1),
580 GRP_MUX("ebu wait", EBU, danube_pins_ebu_wait),
581 GRP_MUX("nand ale", EBU, danube_pins_nand_ale),
582 GRP_MUX("nand cs1", EBU, danube_pins_nand_cs1),
583 GRP_MUX("nand cle", EBU, danube_pins_nand_cle),
584 GRP_MUX("spi", SPI, danube_pins_spi), /* DEPRECATED */
585 GRP_MUX("spi_di", SPI, danube_pins_spi_di),
586 GRP_MUX("spi_do", SPI, danube_pins_spi_do),
587 GRP_MUX("spi_clk", SPI, danube_pins_spi_clk),
588 GRP_MUX("spi_cs1", SPI, danube_pins_spi_cs1),
589 GRP_MUX("spi_cs2", SPI, danube_pins_spi_cs2),
590 GRP_MUX("spi_cs3", SPI, danube_pins_spi_cs3),
591 GRP_MUX("spi_cs4", SPI, danube_pins_spi_cs4),
592 GRP_MUX("spi_cs5", SPI, danube_pins_spi_cs5),
593 GRP_MUX("spi_cs6", SPI, danube_pins_spi_cs6),
594 GRP_MUX("asc0", ASC, danube_pins_asc0),
595 GRP_MUX("asc0 cts rts", ASC, danube_pins_asc0_cts_rts),
596 GRP_MUX("stp", STP, danube_pins_stp),
597 GRP_MUX("nmi", NMI, danube_pins_nmi),
598 GRP_MUX("gpt1", GPT, danube_pins_gpt1),
599 GRP_MUX("gpt2", GPT, danube_pins_gpt2),
600 GRP_MUX("gpt3", GPT, danube_pins_gpt3),
601 GRP_MUX("clkout0", CGU, danube_pins_clkout0),
602 GRP_MUX("clkout1", CGU, danube_pins_clkout1),
603 GRP_MUX("clkout2", CGU, danube_pins_clkout2),
604 GRP_MUX("clkout3", CGU, danube_pins_clkout3),
605 GRP_MUX("gnt1", PCI, danube_pins_pci_gnt1),
606 GRP_MUX("gnt2", PCI, danube_pins_pci_gnt2),
607 GRP_MUX("gnt3", PCI, danube_pins_pci_gnt3),
608 GRP_MUX("req1", PCI, danube_pins_pci_req1),
609 GRP_MUX("req2", PCI, danube_pins_pci_req2),
610 GRP_MUX("req3", PCI, danube_pins_pci_req3),
611 GRP_MUX("dfe led0", DFE, danube_pins_dfe_led0),
612 GRP_MUX("dfe led1", DFE, danube_pins_dfe_led1),
776 GRP_MUX("exin0", EXIN, xrx100_pins_exin0),
777 GRP_MUX("exin1", EXIN, xrx100_pins_exin1),
778 GRP_MUX("exin2", EXIN, xrx100_pins_exin2),
779 GRP_MUX("exin3", EXIN, xrx100_pins_exin3),
780 GRP_MUX("exin4", EXIN, xrx100_pins_exin4),
781 GRP_MUX("exin5", EXIN, xrx100_pins_exin5),
782 GRP_MUX("ebu a23", EBU, xrx100_pins_ebu_a23),
783 GRP_MUX("ebu a24", EBU, xrx100_pins_ebu_a24),
784 GRP_MUX("ebu a25", EBU, xrx100_pins_ebu_a25),
785 GRP_MUX("ebu clk", EBU, xrx100_pins_ebu_clk),
786 GRP_MUX("ebu cs1", EBU, xrx100_pins_ebu_cs1),
787 GRP_MUX("ebu wait", EBU, xrx100_pins_ebu_wait),
788 GRP_MUX("nand ale", EBU, xrx100_pins_nand_ale),
789 GRP_MUX("nand cs1", EBU, xrx100_pins_nand_cs1),
790 GRP_MUX("nand cle", EBU, xrx100_pins_nand_cle),
791 GRP_MUX("nand rdy", EBU, xrx100_pins_nand_rdy),
792 GRP_MUX("nand rd", EBU, xrx100_pins_nand_rd),
793 GRP_MUX("spi_di", SPI, xrx100_pins_spi_di),
794 GRP_MUX("spi_do", SPI, xrx100_pins_spi_do),
795 GRP_MUX("spi_clk", SPI, xrx100_pins_spi_clk),
796 GRP_MUX("spi_cs1", SPI, xrx100_pins_spi_cs1),
797 GRP_MUX("spi_cs2", SPI, xrx100_pins_spi_cs2),
798 GRP_MUX("spi_cs3", SPI, xrx100_pins_spi_cs3),
799 GRP_MUX("spi_cs4", SPI, xrx100_pins_spi_cs4),
800 GRP_MUX("spi_cs5", SPI, xrx100_pins_spi_cs5),
801 GRP_MUX("spi_cs6", SPI, xrx100_pins_spi_cs6),
802 GRP_MUX("asc0", ASC, xrx100_pins_asc0),
803 GRP_MUX("asc0 cts rts", ASC, xrx100_pins_asc0_cts_rts),
804 GRP_MUX("stp", STP, xrx100_pins_stp),
805 GRP_MUX("nmi", NMI, xrx100_pins_nmi),
806 GRP_MUX("gpt1", GPT, xrx100_pins_gpt1),
807 GRP_MUX("gpt2", GPT, xrx100_pins_gpt2),
808 GRP_MUX("gpt3", GPT, xrx100_pins_gpt3),
809 GRP_MUX("clkout0", CGU, xrx100_pins_clkout0),
810 GRP_MUX("clkout1", CGU, xrx100_pins_clkout1),
811 GRP_MUX("clkout2", CGU, xrx100_pins_clkout2),
812 GRP_MUX("clkout3", CGU, xrx100_pins_clkout3),
813 GRP_MUX("gnt1", PCI, xrx100_pins_pci_gnt1),
814 GRP_MUX("gnt2", PCI, xrx100_pins_pci_gnt2),
815 GRP_MUX("gnt3", PCI, xrx100_pins_pci_gnt3),
816 GRP_MUX("gnt4", PCI, xrx100_pins_pci_gnt4),
817 GRP_MUX("req1", PCI, xrx100_pins_pci_req1),
818 GRP_MUX("req2", PCI, xrx100_pins_pci_req2),
819 GRP_MUX("req3", PCI, xrx100_pins_pci_req3),
820 GRP_MUX("req4", PCI, xrx100_pins_pci_req4),
821 GRP_MUX("mdio", MDIO, xrx100_pins_mdio),
822 GRP_MUX("dfe led0", DFE, xrx100_pins_dfe_led0),
823 GRP_MUX("dfe led1", DFE, xrx100_pins_dfe_led1),
1004 GRP_MUX("exin0", EXIN, xrx200_pins_exin0),
1005 GRP_MUX("exin1", EXIN, xrx200_pins_exin1),
1006 GRP_MUX("exin2", EXIN, xrx200_pins_exin2),
1007 GRP_MUX("exin3", EXIN, xrx200_pins_exin3),
1008 GRP_MUX("exin4", EXIN, xrx200_pins_exin4),
1009 GRP_MUX("exin5", EXIN, xrx200_pins_exin5),
1010 GRP_MUX("ebu a23", EBU, xrx200_pins_ebu_a23),
1011 GRP_MUX("ebu a24", EBU, xrx200_pins_ebu_a24),
1012 GRP_MUX("ebu a25", EBU, xrx200_pins_ebu_a25),
1013 GRP_MUX("ebu clk", EBU, xrx200_pins_ebu_clk),
1014 GRP_MUX("ebu cs1", EBU, xrx200_pins_ebu_cs1),
1015 GRP_MUX("ebu wait", EBU, xrx200_pins_ebu_wait),
1016 GRP_MUX("nand ale", EBU, xrx200_pins_nand_ale),
1017 GRP_MUX("nand cs1", EBU, xrx200_pins_nand_cs1),
1018 GRP_MUX("nand cle", EBU, xrx200_pins_nand_cle),
1019 GRP_MUX("nand rdy", EBU, xrx200_pins_nand_rdy),
1020 GRP_MUX("nand rd", EBU, xrx200_pins_nand_rd),
1021 GRP_MUX("spi_di", SPI, xrx200_pins_spi_di),
1022 GRP_MUX("spi_do", SPI, xrx200_pins_spi_do),
1023 GRP_MUX("spi_clk", SPI, xrx200_pins_spi_clk),
1024 GRP_MUX("spi_cs1", SPI, xrx200_pins_spi_cs1),
1025 GRP_MUX("spi_cs2", SPI, xrx200_pins_spi_cs2),
1026 GRP_MUX("spi_cs3", SPI, xrx200_pins_spi_cs3),
1027 GRP_MUX("spi_cs4", SPI, xrx200_pins_spi_cs4),
1028 GRP_MUX("spi_cs5", SPI, xrx200_pins_spi_cs5),
1029 GRP_MUX("spi_cs6", SPI, xrx200_pins_spi_cs6),
1030 GRP_MUX("usif uart_rx", USIF, xrx200_pins_usif_uart_rx),
1031 GRP_MUX("usif uart_tx", USIF, xrx200_pins_usif_uart_tx),
1032 GRP_MUX("usif uart_rts", USIF, xrx200_pins_usif_uart_rts),
1033 GRP_MUX("usif uart_cts", USIF, xrx200_pins_usif_uart_cts),
1034 GRP_MUX("usif uart_dtr", USIF, xrx200_pins_usif_uart_dtr),
1035 GRP_MUX("usif uart_dsr", USIF, xrx200_pins_usif_uart_dsr),
1036 GRP_MUX("usif uart_dcd", USIF, xrx200_pins_usif_uart_dcd),
1037 GRP_MUX("usif uart_ri", USIF, xrx200_pins_usif_uart_ri),
1038 GRP_MUX("usif spi_di", USIF, xrx200_pins_usif_spi_di),
1039 GRP_MUX("usif spi_do", USIF, xrx200_pins_usif_spi_do),
1040 GRP_MUX("usif spi_clk", USIF, xrx200_pins_usif_spi_clk),
1041 GRP_MUX("usif spi_cs0", USIF, xrx200_pins_usif_spi_cs0),
1042 GRP_MUX("usif spi_cs1", USIF, xrx200_pins_usif_spi_cs1),
1043 GRP_MUX("usif spi_cs2", USIF, xrx200_pins_usif_spi_cs2),
1044 GRP_MUX("stp", STP, xrx200_pins_stp),
1045 GRP_MUX("nmi", NMI, xrx200_pins_nmi),
1046 GRP_MUX("gpt1", GPT, xrx200_pins_gpt1),
1047 GRP_MUX("gpt2", GPT, xrx200_pins_gpt2),
1048 GRP_MUX("gpt3", GPT, xrx200_pins_gpt3),
1049 GRP_MUX("clkout0", CGU, xrx200_pins_clkout0),
1050 GRP_MUX("clkout1", CGU, xrx200_pins_clkout1),
1051 GRP_MUX("clkout2", CGU, xrx200_pins_clkout2),
1052 GRP_MUX("clkout3", CGU, xrx200_pins_clkout3),
1053 GRP_MUX("gnt1", PCI, xrx200_pins_pci_gnt1),
1054 GRP_MUX("gnt2", PCI, xrx200_pins_pci_gnt2),
1055 GRP_MUX("gnt3", PCI, xrx200_pins_pci_gnt3),
1056 GRP_MUX("gnt4", PCI, xrx200_pins_pci_gnt4),
1057 GRP_MUX("req1", PCI, xrx200_pins_pci_req1),
1058 GRP_MUX("req2", PCI, xrx200_pins_pci_req2),
1059 GRP_MUX("req3", PCI, xrx200_pins_pci_req3),
1060 GRP_MUX("req4", PCI, xrx200_pins_pci_req4),
1061 GRP_MUX("mdio", MDIO, xrx200_pins_mdio),
1062 GRP_MUX("dfe led0", DFE, xrx200_pins_dfe_led0),
1063 GRP_MUX("dfe led1", DFE, xrx200_pins_dfe_led1),
1064 GRP_MUX("gphy0 led0", GPHY, xrx200_pins_gphy0_led0),
1065 GRP_MUX("gphy0 led1", GPHY, xrx200_pins_gphy0_led1),
1066 GRP_MUX("gphy0 led2", GPHY, xrx200_pins_gphy0_led2),
1067 GRP_MUX("gphy1 led0", GPHY, xrx200_pins_gphy1_led0),
1068 GRP_MUX("gphy1 led1", GPHY, xrx200_pins_gphy1_led1),
1069 GRP_MUX("gphy1 led2", GPHY, xrx200_pins_gphy1_led2),
1254 GRP_MUX("exin0", EXIN, xrx300_pins_exin0),
1255 GRP_MUX("exin1", EXIN, xrx300_pins_exin1),
1256 GRP_MUX("exin2", EXIN, xrx300_pins_exin2),
1257 GRP_MUX("exin4", EXIN, xrx300_pins_exin4),
1258 GRP_MUX("exin5", EXIN, xrx300_pins_exin5),
1259 GRP_MUX("nand ale", EBU, xrx300_pins_nand_ale),
1260 GRP_MUX("nand cs1", EBU, xrx300_pins_nand_cs1),
1261 GRP_MUX("nand cle", EBU, xrx300_pins_nand_cle),
1262 GRP_MUX("nand rdy", EBU, xrx300_pins_nand_rdy),
1263 GRP_MUX("nand rd", EBU, xrx300_pins_nand_rd),
1264 GRP_MUX("nand d1", EBU, xrx300_pins_nand_d1),
1265 GRP_MUX("nand d0", EBU, xrx300_pins_nand_d0),
1266 GRP_MUX("nand d2", EBU, xrx300_pins_nand_d2),
1267 GRP_MUX("nand d7", EBU, xrx300_pins_nand_d7),
1268 GRP_MUX("nand d6", EBU, xrx300_pins_nand_d6),
1269 GRP_MUX("nand d5", EBU, xrx300_pins_nand_d5),
1270 GRP_MUX("nand d4", EBU, xrx300_pins_nand_d4),
1271 GRP_MUX("nand d3", EBU, xrx300_pins_nand_d3),
1272 GRP_MUX("nand cs0", EBU, xrx300_pins_nand_cs0),
1273 GRP_MUX("nand wr", EBU, xrx300_pins_nand_wr),
1274 GRP_MUX("nand wp", EBU, xrx300_pins_nand_wp),
1275 GRP_MUX("nand se", EBU, xrx300_pins_nand_se),
1276 GRP_MUX("spi_di", SPI, xrx300_pins_spi_di),
1277 GRP_MUX("spi_do", SPI, xrx300_pins_spi_do),
1278 GRP_MUX("spi_clk", SPI, xrx300_pins_spi_clk),
1279 GRP_MUX("spi_cs1", SPI, xrx300_pins_spi_cs1),
1280 GRP_MUX("spi_cs4", SPI, xrx300_pins_spi_cs4),
1281 GRP_MUX("spi_cs6", SPI, xrx300_pins_spi_cs6),
1282 GRP_MUX("usif uart_rx", USIF, xrx300_pins_usif_uart_rx),
1283 GRP_MUX("usif uart_tx", USIF, xrx300_pins_usif_uart_tx),
1284 GRP_MUX("usif spi_di", USIF, xrx300_pins_usif_spi_di),
1285 GRP_MUX("usif spi_do", USIF, xrx300_pins_usif_spi_do),
1286 GRP_MUX("usif spi_clk", USIF, xrx300_pins_usif_spi_clk),
1287 GRP_MUX("usif spi_cs0", USIF, xrx300_pins_usif_spi_cs0),
1288 GRP_MUX("stp", STP, xrx300_pins_stp),
1289 GRP_MUX("clkout2", CGU, xrx300_pins_clkout2),
1290 GRP_MUX("mdio", MDIO, xrx300_pins_mdio),
1291 GRP_MUX("dfe led0", DFE, xrx300_pins_dfe_led0),
1292 GRP_MUX("dfe led1", DFE, xrx300_pins_dfe_led1),
1293 GRP_MUX("ephy0 led0", GPHY, xrx300_pins_ephy0_led0),
1294 GRP_MUX("ephy0 led1", GPHY, xrx300_pins_ephy0_led1),
1295 GRP_MUX("ephy1 led0", GPHY, xrx300_pins_ephy1_led0),
1296 GRP_MUX("ephy1 led1", GPHY, xrx300_pins_ephy1_led1),