Lines Matching refs:regval
657 unsigned int regval, val; in artpec6_pmx_select_func() local
684 regval = readl(pmx->base + reg); in artpec6_pmx_select_func()
685 regval &= ~ARTPEC6_PINMUX_SEL_MASK; in artpec6_pmx_select_func()
686 regval |= val; in artpec6_pmx_select_func()
687 writel(regval, pmx->base + reg); in artpec6_pmx_select_func()
749 unsigned int regval; in artpec6_pconf_get() local
762 regval = readl(pmx->base + artpec6_pmx_reg_offset(pin)); in artpec6_pconf_get()
767 if (!(regval & ARTPEC6_PINMUX_UDC1_MASK)) in artpec6_pconf_get()
773 if (regval & ARTPEC6_PINMUX_UDC1_MASK) in artpec6_pconf_get()
776 regval = regval & ARTPEC6_PINMUX_UDC0_MASK; in artpec6_pconf_get()
777 if ((param == PIN_CONFIG_BIAS_PULL_UP && !regval) || in artpec6_pconf_get()
778 (param == PIN_CONFIG_BIAS_PULL_DOWN && regval)) in artpec6_pconf_get()
782 regval = (regval & ARTPEC6_PINMUX_DRV_MASK) in artpec6_pconf_get()
784 regval = artpec6_pconf_drive_field_to_mA(regval); in artpec6_pconf_get()
785 *config = pinconf_to_config_packed(param, regval); in artpec6_pconf_get()
811 unsigned int regval; in artpec6_pconf_set() local
836 regval = readl(reg); in artpec6_pconf_set()
837 regval |= (1 << ARTPEC6_PINMUX_UDC1_SHIFT); in artpec6_pconf_set()
838 writel(regval, reg); in artpec6_pconf_set()
848 regval = readl(reg); in artpec6_pconf_set()
849 regval |= (arg << ARTPEC6_PINMUX_UDC0_SHIFT); in artpec6_pconf_set()
850 regval &= ~ARTPEC6_PINMUX_UDC1_MASK; /* Enable */ in artpec6_pconf_set()
851 writel(regval, reg); in artpec6_pconf_set()
861 regval = readl(reg); in artpec6_pconf_set()
862 regval &= ~(arg << ARTPEC6_PINMUX_UDC0_SHIFT); in artpec6_pconf_set()
863 regval &= ~ARTPEC6_PINMUX_UDC1_MASK; /* Enable */ in artpec6_pconf_set()
864 writel(regval, reg); in artpec6_pconf_set()
875 regval = readl(reg); in artpec6_pconf_set()
876 regval &= ~ARTPEC6_PINMUX_DRV_MASK; in artpec6_pconf_set()
877 regval |= (drive << ARTPEC6_PINMUX_DRV_SHIFT); in artpec6_pconf_set()
878 writel(regval, reg); in artpec6_pconf_set()