174 	unsigned gpp, offset, gpp_offset;  in intel_pad_owned_by_host()  local
187 	gpp_offset = padgroup_offset(padgrp, pin);  in intel_pad_owned_by_host()
188 	gpp = PADOWN_GPP(gpp_offset);  in intel_pad_owned_by_host()
192 	return !(readl(padown) & PADOWN_MASK(gpp_offset));  in intel_pad_owned_by_host()
199 	unsigned offset, gpp_offset;  in intel_pad_acpi_mode()  local
212 	gpp_offset = padgroup_offset(padgrp, pin);  in intel_pad_acpi_mode()
216 	return !(readl(hostown) & BIT(gpp_offset));  in intel_pad_acpi_mode()
223 	unsigned offset, gpp_offset;  in intel_pad_locked()  local
236 	gpp_offset = padgroup_offset(padgrp, pin);  in intel_pad_locked()
245 	if (value & BIT(gpp_offset))  in intel_pad_locked()
250 	if (value & BIT(gpp_offset))  in intel_pad_locked()
900 		unsigned gpp, gpp_offset, is_offset;  in intel_gpio_irq_ack()  local
903 		gpp_offset = padgroup_offset(padgrp, pin);  in intel_gpio_irq_ack()
907 		writel(BIT(gpp_offset), community->regs + is_offset);  in intel_gpio_irq_ack()
922 		unsigned gpp, gpp_offset, is_offset;  in intel_gpio_irq_enable()  local
927 		gpp_offset = padgroup_offset(padgrp, pin);  in intel_gpio_irq_enable()
932 		writel(BIT(gpp_offset), community->regs + is_offset);  in intel_gpio_irq_enable()
935 		value |= BIT(gpp_offset);  in intel_gpio_irq_enable()
951 		unsigned gpp, gpp_offset;  in intel_gpio_irq_mask_unmask()  local
957 		gpp_offset = padgroup_offset(padgrp, pin);  in intel_gpio_irq_mask_unmask()
964 			value &= ~BIT(gpp_offset);  in intel_gpio_irq_mask_unmask()
966 			value |= BIT(gpp_offset);  in intel_gpio_irq_mask_unmask()
1063 		unsigned long pending, enabled, gpp_offset;  in intel_gpio_community_irq_handler()  local
1073 		for_each_set_bit(gpp_offset, &pending, padgrp->size) {  in intel_gpio_community_irq_handler()
1077 					       padgrp->gpio_base + gpp_offset);  in intel_gpio_community_irq_handler()