174 	unsigned gpp, offset, gpp_offset;  in intel_pad_owned_by_host()  local
188 	gpp = PADOWN_GPP(gpp_offset);  in intel_pad_owned_by_host()
189 	offset = community->padown_offset + padgrp->padown_num * 4 + gpp * 4;  in intel_pad_owned_by_host()
900 		unsigned gpp, gpp_offset, is_offset;  in intel_gpio_irq_ack()  local
902 		gpp = padgrp->reg_num;  in intel_gpio_irq_ack()
904 		is_offset = community->is_offset + gpp * 4;  in intel_gpio_irq_ack()
922 		unsigned gpp, gpp_offset, is_offset;  in intel_gpio_irq_enable()  local
926 		gpp = padgrp->reg_num;  in intel_gpio_irq_enable()
928 		is_offset = community->is_offset + gpp * 4;  in intel_gpio_irq_enable()
934 		value = readl(community->regs + community->ie_offset + gpp * 4);  in intel_gpio_irq_enable()
936 		writel(value, community->regs + community->ie_offset + gpp * 4);  in intel_gpio_irq_enable()
951 		unsigned gpp, gpp_offset;  in intel_gpio_irq_mask_unmask()  local
956 		gpp = padgrp->reg_num;  in intel_gpio_irq_mask_unmask()
959 		reg = community->regs + community->ie_offset + gpp * 4;  in intel_gpio_irq_mask_unmask()
1059 	int gpp;  in intel_gpio_community_irq_handler()  local
1061 	for (gpp = 0; gpp < community->ngpps; gpp++) {  in intel_gpio_community_irq_handler()
1062 		const struct intel_padgroup *padgrp = &community->gpps[gpp];  in intel_gpio_community_irq_handler()
1120 		const struct intel_padgroup *gpp = &community->gpps[i];  in intel_gpio_add_pin_ranges()  local
1122 		if (gpp->gpio_base < 0)  in intel_gpio_add_pin_ranges()
1126 					     gpp->gpio_base, gpp->base,  in intel_gpio_add_pin_ranges()
1127 					     gpp->size);  in intel_gpio_add_pin_ranges()
1144 			const struct intel_padgroup *gpp = &community->gpps[j];  in intel_gpio_ngpio()  local
1146 			if (gpp->gpio_base < 0)  in intel_gpio_ngpio()
1149 			if (gpp->gpio_base + gpp->size > ngpio)  in intel_gpio_ngpio()
1150 				ngpio = gpp->gpio_base + gpp->size;  in intel_gpio_ngpio()
1453 		unsigned gpp;  in intel_pinctrl_suspend()  local
1456 		for (gpp = 0; gpp < community->ngpps; gpp++)  in intel_pinctrl_suspend()
1457 			communities[i].intmask[gpp] = readl(base + gpp * 4);  in intel_pinctrl_suspend()
1471 		unsigned gpp;  in intel_gpio_irq_init()  local
1476 		for (gpp = 0; gpp < community->ngpps; gpp++) {  in intel_gpio_irq_init()
1478 			writel(0, base + community->ie_offset + gpp * 4);  in intel_gpio_irq_init()
1479 			writel(0xffff, base + community->is_offset + gpp * 4);  in intel_gpio_irq_init()
1535 		unsigned gpp;  in intel_pinctrl_resume()  local
1538 		for (gpp = 0; gpp < community->ngpps; gpp++) {  in intel_pinctrl_resume()
1539 			writel(communities[i].intmask[gpp], base + gpp * 4);  in intel_pinctrl_resume()
1540 			dev_dbg(dev, "restored mask %d/%u %#08x\n", i, gpp,  in intel_pinctrl_resume()
1541 				readl(base + gpp * 4));  in intel_pinctrl_resume()