739 	u32 ctrl0, ctrl1;  in chv_pin_dbg_show()  local
744 	ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0));  in chv_pin_dbg_show()
750 	if (ctrl0 & CHV_PADCTRL0_GPIOEN) {  in chv_pin_dbg_show()
755 		mode = ctrl0 & CHV_PADCTRL0_PMODE_MASK;  in chv_pin_dbg_show()
761 	seq_printf(s, "0x%08x 0x%08x", ctrl0, ctrl1);  in chv_pin_dbg_show()
951 	u32 ctrl0;  in chv_gpio_set_direction()  local
955 	ctrl0 = readl(reg) & ~CHV_PADCTRL0_GPIOCFG_MASK;  in chv_gpio_set_direction()
957 		ctrl0 |= CHV_PADCTRL0_GPIOCFG_GPI << CHV_PADCTRL0_GPIOCFG_SHIFT;  in chv_gpio_set_direction()
959 		ctrl0 |= CHV_PADCTRL0_GPIOCFG_GPO << CHV_PADCTRL0_GPIOCFG_SHIFT;  in chv_gpio_set_direction()
960 	chv_writel(ctrl0, reg);  in chv_gpio_set_direction()
983 	u32 ctrl0, ctrl1;  in chv_config_get()  local
988 	ctrl0 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0));  in chv_config_get()
992 	term = (ctrl0 & CHV_PADCTRL0_TERM_MASK) >> CHV_PADCTRL0_TERM_SHIFT;  in chv_config_get()
1001 		if (!(ctrl0 & CHV_PADCTRL0_TERM_UP))  in chv_config_get()
1019 		if (!term || (ctrl0 & CHV_PADCTRL0_TERM_UP))  in chv_config_get()
1041 		cfg = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;  in chv_config_get()
1062 	u32 ctrl0, pull;  in chv_config_set_pull()  local
1065 	ctrl0 = readl(reg);  in chv_config_set_pull()
1069 		ctrl0 &= ~(CHV_PADCTRL0_TERM_MASK | CHV_PADCTRL0_TERM_UP);  in chv_config_set_pull()
1073 		ctrl0 &= ~(CHV_PADCTRL0_TERM_MASK | CHV_PADCTRL0_TERM_UP);  in chv_config_set_pull()
1091 		ctrl0 |= CHV_PADCTRL0_TERM_UP | pull;  in chv_config_set_pull()
1095 		ctrl0 &= ~(CHV_PADCTRL0_TERM_MASK | CHV_PADCTRL0_TERM_UP);  in chv_config_set_pull()
1109 		ctrl0 |= pull;  in chv_config_set_pull()
1117 	chv_writel(ctrl0, reg);  in chv_config_set_pull()
1250 	u32 ctrl0, cfg;  in chv_gpio_get()  local
1253 	ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0));  in chv_gpio_get()
1256 	cfg = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;  in chv_gpio_get()
1260 		return !!(ctrl0 & CHV_PADCTRL0_GPIOTXSTATE);  in chv_gpio_get()
1261 	return !!(ctrl0 & CHV_PADCTRL0_GPIORXSTATE);  in chv_gpio_get()
1269 	u32 ctrl0;  in chv_gpio_set()  local
1274 	ctrl0 = readl(reg);  in chv_gpio_set()
1277 		ctrl0 |= CHV_PADCTRL0_GPIOTXSTATE;  in chv_gpio_set()
1279 		ctrl0 &= ~CHV_PADCTRL0_GPIOTXSTATE;  in chv_gpio_set()
1281 	chv_writel(ctrl0, reg);  in chv_gpio_set()
1289 	u32 ctrl0, direction;  in chv_gpio_get_direction()  local
1293 	ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0));  in chv_gpio_get_direction()
1296 	direction = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;  in chv_gpio_get_direction()