Lines Matching refs:chv_writel
693 static void chv_writel(u32 value, void __iomem *reg) in chv_writel() function
848 chv_writel(value, reg); in chv_pinmux_set_mux()
855 chv_writel(value, reg); in chv_pinmux_set_mux()
900 chv_writel(value, reg); in chv_gpio_request_enable()
918 chv_writel(value, reg); in chv_gpio_request_enable()
939 chv_writel(value, reg); in chv_gpio_disable_free()
960 chv_writel(ctrl0, reg); in chv_gpio_set_direction()
1117 chv_writel(ctrl0, reg); in chv_config_set_pull()
1138 chv_writel(ctrl1, reg); in chv_config_set_oden()
1281 chv_writel(ctrl0, reg); in chv_gpio_set()
1337 chv_writel(BIT(intr_line), pctrl->regs + CHV_INTSTAT); in chv_gpio_irq_ack()
1361 chv_writel(value, pctrl->regs + CHV_INTMASK); in chv_gpio_irq_mask_unmask()
1461 chv_writel(value, reg); in chv_gpio_irq_type()
1617 chv_writel(GENMASK(31, pctrl->community->nirqs), in chv_gpio_probe()
1622 chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); in chv_gpio_probe()
1666 chv_writel((u32)(*value), pctrl->regs + (u32)address); in chv_pinctrl_mmio_access_handler()
1810 chv_writel(0, pctrl->regs + CHV_INTMASK); in chv_pinctrl_resume_noirq()
1828 chv_writel(ctx->padctrl0, reg); in chv_pinctrl_resume_noirq()
1836 chv_writel(ctx->padctrl1, reg); in chv_pinctrl_resume_noirq()
1846 chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); in chv_pinctrl_resume_noirq()
1847 chv_writel(pctrl->saved_intmask, pctrl->regs + CHV_INTMASK); in chv_pinctrl_resume_noirq()