Lines Matching refs:SCU90
58 #define I2C9_DESC SIG_DESC_SET(SCU90, 22)
75 #define MDIO2_DESC SIG_DESC_SET(SCU90, 2)
127 SIG_DESC_BIT(SCU90, 31, 0),
131 SIG_DESC_SET(SCU90, 31));
137 #define SD1_DESC SIG_DESC_SET(SCU90, 0)
138 #define I2C10_DESC SIG_DESC_SET(SCU90, 23)
152 #define I2C11_DESC SIG_DESC_SET(SCU90, 24)
166 #define I2C12_DESC SIG_DESC_SET(SCU90, 25)
180 #define I2C13_DESC SIG_DESC_SET(SCU90, 26)
195 #define SD2_DESC SIG_DESC_SET(SCU90, 1)
437 #define UART6_DESC SIG_DESC_SET(SCU90, 7)
438 #define ROM16_DESC SIG_DESC_SET(SCU90, 6)
602 #define I2C5_DESC SIG_DESC_SET(SCU90, 18)
614 #define I2C6_DESC SIG_DESC_SET(SCU90, 19)
626 #define I2C7_DESC SIG_DESC_SET(SCU90, 20)
638 #define I2C8_DESC SIG_DESC_SET(SCU90, 21)
653 #define VPI18_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 1, 0 }
654 #define VPI24_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 2, 0 }
655 #define VPI30_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 3, 0 }
973 #define I2C3_DESC SIG_DESC_SET(SCU90, 16)
985 #define I2C4_DESC SIG_DESC_SET(SCU90, 17)
997 #define I2C14_DESC SIG_DESC_SET(SCU90, 27)
1017 #define USB11H3_DESC SIG_DESC_SET(SCU90, 28)
1717 #define USB11H2_DESC SIG_DESC_SET(SCU90, 3)
1718 #define USB11D1_DESC SIG_DESC_BIT(SCU90, 3, 0)
1733 #define USB2H1_DESC SIG_DESC_SET(SCU90, 29)
1734 #define USB2D1_DESC SIG_DESC_BIT(SCU90, 29, 0)
2323 { PIN_CONFIG_DRIVE_STRENGTH, { A12, A13 }, SCU90, 9 },
2324 { PIN_CONFIG_BIAS_PULL_DOWN, { A12, A13 }, SCU90, 12 },
2325 { PIN_CONFIG_BIAS_DISABLE, { A12, A13 }, SCU90, 12 },
2328 { PIN_CONFIG_DRIVE_STRENGTH, { D9, D10 }, SCU90, 11 },
2329 { PIN_CONFIG_BIAS_PULL_DOWN, { D9, D10 }, SCU90, 14 },
2330 { PIN_CONFIG_BIAS_DISABLE, { D9, D10 }, SCU90, 14 },
2333 { PIN_CONFIG_BIAS_PULL_DOWN, { E11, E10 }, SCU90, 13 },
2334 { PIN_CONFIG_BIAS_DISABLE, { E11, E10 }, SCU90, 13 },
2337 { PIN_CONFIG_BIAS_PULL_DOWN, { C9, C8 }, SCU90, 15 },
2338 { PIN_CONFIG_BIAS_DISABLE, { C9, C8 }, SCU90, 15 },