65 static u32 owl_read_field(struct owl_pinctrl *pctrl, u32 reg,  in owl_read_field()  argument
70 	tmp = readl_relaxed(pctrl->base + reg);  in owl_read_field()
76 static void owl_write_field(struct owl_pinctrl *pctrl, u32 reg, u32 arg,  in owl_write_field()  argument
84 	owl_update_bits(pctrl->base + reg, mask, (arg << bit));  in owl_write_field()
89 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_groups_count()  local
91 	return pctrl->soc->ngroups;  in owl_get_groups_count()
97 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_group_name()  local
99 	return pctrl->soc->groups[group].name;  in owl_get_group_name()
107 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_group_pins()  local
109 	*pins = pctrl->soc->groups[group].pads;  in owl_get_group_pins()
110 	*num_pins = pctrl->soc->groups[group].npads;  in owl_get_group_pins()
119 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_pin_dbg_show()  local
121 	seq_printf(s, "%s", dev_name(pctrl->dev));  in owl_pin_dbg_show()
135 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_funcs_count()  local
137 	return pctrl->soc->nfunctions;  in owl_get_funcs_count()
143 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_func_name()  local
145 	return pctrl->soc->functions[function].name;  in owl_get_func_name()
153 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_get_func_groups()  local
155 	*groups = pctrl->soc->functions[function].groups;  in owl_get_func_groups()
156 	*num_groups = pctrl->soc->functions[function].ngroups;  in owl_get_func_groups()
192 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_set_mux()  local
197 	g = &pctrl->soc->groups[group];  in owl_set_mux()
202 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_set_mux()
204 	owl_update_bits(pctrl->base + g->mfpctl_reg, mask, val);  in owl_set_mux()
206 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_set_mux()
308 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_pin_config_get()  local
313 	info = &pctrl->soc->padinfo[pin];  in owl_pin_config_get()
319 	arg = owl_read_field(pctrl, reg, bit, width);  in owl_pin_config_get()
335 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_pin_config_set()  local
342 	info = &pctrl->soc->padinfo[pin];  in owl_pin_config_set()
356 		raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_pin_config_set()
358 		owl_write_field(pctrl, reg, arg, bit, width);  in owl_pin_config_set()
360 		raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_pin_config_set()
471 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_group_config_get()  local
476 	g = &pctrl->soc->groups[group];  in owl_group_config_get()
482 	arg = owl_read_field(pctrl, reg, bit, width);  in owl_group_config_get()
500 	struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);  in owl_group_config_set()  local
506 	g = &pctrl->soc->groups[group];  in owl_group_config_set()
521 		raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_group_config_set()
523 		owl_write_field(pctrl, reg, arg, bit, width);  in owl_group_config_set()
525 		raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_group_config_set()
547 owl_gpio_get_port(struct owl_pinctrl *pctrl, unsigned int *pin)  in owl_gpio_get_port()  argument
551 	for (i = 0; i < pctrl->soc->nports; i++) {  in owl_gpio_get_port()
552 		const struct owl_gpio_port *port = &pctrl->soc->ports[i];  in owl_gpio_get_port()
581 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_request()  local
586 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_request()
590 	gpio_base = pctrl->base + port->offset;  in owl_gpio_request()
596 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_request()
598 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_request()
605 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_free()  local
610 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_free()
614 	gpio_base = pctrl->base + port->offset;  in owl_gpio_free()
616 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_free()
622 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_free()
627 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_get()  local
633 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_get()
637 	gpio_base = pctrl->base + port->offset;  in owl_gpio_get()
639 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_get()
641 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_get()
648 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_set()  local
653 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_set()
657 	gpio_base = pctrl->base + port->offset;  in owl_gpio_set()
659 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_set()
661 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_set()
666 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_direction_input()  local
671 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_direction_input()
675 	gpio_base = pctrl->base + port->offset;  in owl_gpio_direction_input()
677 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_direction_input()
680 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_direction_input()
688 	struct owl_pinctrl *pctrl = gpiochip_get_data(chip);  in owl_gpio_direction_output()  local
693 	port = owl_gpio_get_port(pctrl, &offset);  in owl_gpio_direction_output()
697 	gpio_base = pctrl->base + port->offset;  in owl_gpio_direction_output()
699 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_direction_output()
703 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_direction_output()
708 static void irq_set_type(struct owl_pinctrl *pctrl, int gpio, unsigned int type)  in irq_set_type()  argument
723 		if (owl_gpio_get(&pctrl->chip, gpio))  in irq_set_type()
749 	port = owl_gpio_get_port(pctrl, &gpio);  in irq_set_type()
753 	gpio_base = pctrl->base + port->offset;  in irq_set_type()
755 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in irq_set_type()
763 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in irq_set_type()
769 	struct owl_pinctrl *pctrl = gpiochip_get_data(gc);  in owl_gpio_irq_mask()  local
776 	port = owl_gpio_get_port(pctrl, &gpio);  in owl_gpio_irq_mask()
780 	gpio_base = pctrl->base + port->offset;  in owl_gpio_irq_mask()
782 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_irq_mask()
792 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_irq_mask()
798 	struct owl_pinctrl *pctrl = gpiochip_get_data(gc);  in owl_gpio_irq_unmask()  local
805 	port = owl_gpio_get_port(pctrl, &gpio);  in owl_gpio_irq_unmask()
809 	gpio_base = pctrl->base + port->offset;  in owl_gpio_irq_unmask()
810 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_irq_unmask()
820 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_irq_unmask()
826 	struct owl_pinctrl *pctrl = gpiochip_get_data(gc);  in owl_gpio_irq_ack()  local
838 			irq_set_type(pctrl, gpio, IRQ_TYPE_EDGE_FALLING);  in owl_gpio_irq_ack()
840 			irq_set_type(pctrl, gpio, IRQ_TYPE_EDGE_RISING);  in owl_gpio_irq_ack()
843 	port = owl_gpio_get_port(pctrl, &gpio);  in owl_gpio_irq_ack()
847 	gpio_base = pctrl->base + port->offset;  in owl_gpio_irq_ack()
849 	raw_spin_lock_irqsave(&pctrl->lock, flags);  in owl_gpio_irq_ack()
854 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);  in owl_gpio_irq_ack()
860 	struct owl_pinctrl *pctrl = gpiochip_get_data(gc);  in owl_gpio_irq_set_type()  local
867 	irq_set_type(pctrl, data->hwirq, type);  in owl_gpio_irq_set_type()
874 	struct owl_pinctrl *pctrl = irq_desc_get_handler_data(desc);  in owl_gpio_irq_handler()  local
876 	struct irq_domain *domain = pctrl->chip.irq.domain;  in owl_gpio_irq_handler()
885 	for (i = 0; i < pctrl->soc->nports; i++) {  in owl_gpio_irq_handler()
886 		port = &pctrl->soc->ports[i];  in owl_gpio_irq_handler()
887 		base = pctrl->base + port->offset;  in owl_gpio_irq_handler()
890 		if (parent != pctrl->irq[i])  in owl_gpio_irq_handler()
910 static int owl_gpio_init(struct owl_pinctrl *pctrl)  in owl_gpio_init()  argument
916 	chip = &pctrl->chip;  in owl_gpio_init()
918 	chip->ngpio = pctrl->soc->ngpios;  in owl_gpio_init()
919 	chip->label = dev_name(pctrl->dev);  in owl_gpio_init()
920 	chip->parent = pctrl->dev;  in owl_gpio_init()
922 	chip->of_node = pctrl->dev->of_node;  in owl_gpio_init()
924 	pctrl->irq_chip.name = chip->of_node->name;  in owl_gpio_init()
925 	pctrl->irq_chip.irq_ack = owl_gpio_irq_ack;  in owl_gpio_init()
926 	pctrl->irq_chip.irq_mask = owl_gpio_irq_mask;  in owl_gpio_init()
927 	pctrl->irq_chip.irq_unmask = owl_gpio_irq_unmask;  in owl_gpio_init()
928 	pctrl->irq_chip.irq_set_type = owl_gpio_irq_set_type;  in owl_gpio_init()
931 	gpio_irq->chip = &pctrl->irq_chip;  in owl_gpio_init()
935 	gpio_irq->parent_handler_data = pctrl;  in owl_gpio_init()
936 	gpio_irq->num_parents = pctrl->num_irq;  in owl_gpio_init()
937 	gpio_irq->parents = pctrl->irq;  in owl_gpio_init()
939 	gpio_irq->map = devm_kcalloc(pctrl->dev, chip->ngpio,  in owl_gpio_init()
944 	for (i = 0, offset = 0; i < pctrl->soc->nports; i++) {  in owl_gpio_init()
945 		const struct owl_gpio_port *port = &pctrl->soc->ports[i];  in owl_gpio_init()
953 	ret = gpiochip_add_data(&pctrl->chip, pctrl);  in owl_gpio_init()
955 		dev_err(pctrl->dev, "failed to register gpiochip\n");  in owl_gpio_init()
966 	struct owl_pinctrl *pctrl;  in owl_pinctrl_probe()  local
969 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);  in owl_pinctrl_probe()
970 	if (!pctrl)  in owl_pinctrl_probe()
974 	pctrl->base = devm_ioremap_resource(&pdev->dev, res);  in owl_pinctrl_probe()
975 	if (IS_ERR(pctrl->base))  in owl_pinctrl_probe()
976 		return PTR_ERR(pctrl->base);  in owl_pinctrl_probe()
979 	pctrl->clk = devm_clk_get(&pdev->dev, NULL);  in owl_pinctrl_probe()
980 	if (IS_ERR(pctrl->clk)) {  in owl_pinctrl_probe()
982 		return PTR_ERR(pctrl->clk);  in owl_pinctrl_probe()
985 	ret = clk_prepare_enable(pctrl->clk);  in owl_pinctrl_probe()
991 	raw_spin_lock_init(&pctrl->lock);  in owl_pinctrl_probe()
997 	pctrl->chip.direction_input  = owl_gpio_direction_input;  in owl_pinctrl_probe()
998 	pctrl->chip.direction_output = owl_gpio_direction_output;  in owl_pinctrl_probe()
999 	pctrl->chip.get = owl_gpio_get;  in owl_pinctrl_probe()
1000 	pctrl->chip.set = owl_gpio_set;  in owl_pinctrl_probe()
1001 	pctrl->chip.request = owl_gpio_request;  in owl_pinctrl_probe()
1002 	pctrl->chip.free = owl_gpio_free;  in owl_pinctrl_probe()
1004 	pctrl->soc = soc_data;  in owl_pinctrl_probe()
1005 	pctrl->dev = &pdev->dev;  in owl_pinctrl_probe()
1007 	pctrl->pctrldev = devm_pinctrl_register(&pdev->dev,  in owl_pinctrl_probe()
1008 					&owl_pinctrl_desc, pctrl);  in owl_pinctrl_probe()
1009 	if (IS_ERR(pctrl->pctrldev)) {  in owl_pinctrl_probe()
1011 		ret = PTR_ERR(pctrl->pctrldev);  in owl_pinctrl_probe()
1019 	pctrl->num_irq = ret;  in owl_pinctrl_probe()
1021 	pctrl->irq = devm_kcalloc(&pdev->dev, pctrl->num_irq,  in owl_pinctrl_probe()
1022 					sizeof(*pctrl->irq), GFP_KERNEL);  in owl_pinctrl_probe()
1023 	if (!pctrl->irq) {  in owl_pinctrl_probe()
1028 	for (i = 0; i < pctrl->num_irq ; i++) {  in owl_pinctrl_probe()
1032 		pctrl->irq[i] = ret;  in owl_pinctrl_probe()
1035 	ret = owl_gpio_init(pctrl);  in owl_pinctrl_probe()
1039 	platform_set_drvdata(pdev, pctrl);  in owl_pinctrl_probe()
1044 	clk_disable_unprepare(pctrl->clk);  in owl_pinctrl_probe()