211 	writel_relaxed(gang, l3pmu->regs + L3_M_BC_GANG);  in qcom_l3_cache__64bit_counter_start()
215 	writel_relaxed(0, l3pmu->regs + L3_HML3_PM_EVCNTR(idx + 1));  in qcom_l3_cache__64bit_counter_start()
216 	writel_relaxed(0, l3pmu->regs + L3_HML3_PM_EVCNTR(idx));  in qcom_l3_cache__64bit_counter_start()
222 	writel_relaxed(EVSEL(0), l3pmu->regs + L3_HML3_PM_EVTYPE(idx + 1));  in qcom_l3_cache__64bit_counter_start()
223 	writel_relaxed(EVSEL(evsel), l3pmu->regs + L3_HML3_PM_EVTYPE(idx));  in qcom_l3_cache__64bit_counter_start()
226 	writel_relaxed(PMCNT_RESET, l3pmu->regs + L3_HML3_PM_CNTCTL(idx + 1));  in qcom_l3_cache__64bit_counter_start()
227 	writel_relaxed(PMCNTENSET(idx + 1), l3pmu->regs + L3_M_BC_CNTENSET);  in qcom_l3_cache__64bit_counter_start()
228 	writel_relaxed(PMCNT_RESET, l3pmu->regs + L3_HML3_PM_CNTCTL(idx));  in qcom_l3_cache__64bit_counter_start()
229 	writel_relaxed(PMCNTENSET(idx), l3pmu->regs + L3_M_BC_CNTENSET);  in qcom_l3_cache__64bit_counter_start()
240 	writel_relaxed(PMCNTENCLR(idx), l3pmu->regs + L3_M_BC_CNTENCLR);  in qcom_l3_cache__64bit_counter_stop()
241 	writel_relaxed(PMCNTENCLR(idx + 1), l3pmu->regs + L3_M_BC_CNTENCLR);  in qcom_l3_cache__64bit_counter_stop()
244 	writel_relaxed(gang & ~GANG_EN(idx + 1), l3pmu->regs + L3_M_BC_GANG);  in qcom_l3_cache__64bit_counter_stop()
290 	writel_relaxed(irqctl | PMIRQONMSBEN(idx), l3pmu->regs + L3_M_BC_IRQCTL);  in qcom_l3_cache__32bit_counter_start()
294 	writel_relaxed(0, l3pmu->regs + L3_HML3_PM_EVCNTR(idx));  in qcom_l3_cache__32bit_counter_start()
297 	writel_relaxed(EVSEL(evsel), l3pmu->regs + L3_HML3_PM_EVTYPE(idx));  in qcom_l3_cache__32bit_counter_start()
300 	writel_relaxed(PMINTENSET(idx), l3pmu->regs + L3_M_BC_INTENSET);  in qcom_l3_cache__32bit_counter_start()
303 	writel_relaxed(PMCNT_RESET, l3pmu->regs + L3_HML3_PM_CNTCTL(idx));  in qcom_l3_cache__32bit_counter_start()
304 	writel_relaxed(PMCNTENSET(idx), l3pmu->regs + L3_M_BC_CNTENSET);  in qcom_l3_cache__32bit_counter_start()
315 	writel_relaxed(PMCNTENCLR(idx), l3pmu->regs + L3_M_BC_CNTENCLR);  in qcom_l3_cache__32bit_counter_stop()
318 	writel_relaxed(PMINTENCLR(idx), l3pmu->regs + L3_M_BC_INTENCLR);  in qcom_l3_cache__32bit_counter_stop()
321 	writel_relaxed(irqctl & ~PMIRQONMSBEN(idx), l3pmu->regs + L3_M_BC_IRQCTL);  in qcom_l3_cache__32bit_counter_stop()
362 	writel_relaxed(BC_RESET, l3pmu->regs + L3_M_BC_CR);  in qcom_l3_cache__init()
370 	writel_relaxed(BC_CNTENCLR_RESET, l3pmu->regs + L3_M_BC_CNTENCLR);  in qcom_l3_cache__init()
371 	writel_relaxed(BC_INTENCLR_RESET, l3pmu->regs + L3_M_BC_INTENCLR);  in qcom_l3_cache__init()
372 	writel_relaxed(PMOVSRCLR_RESET, l3pmu->regs + L3_M_BC_OVSR);  in qcom_l3_cache__init()
373 	writel_relaxed(BC_GANG_RESET, l3pmu->regs + L3_M_BC_GANG);  in qcom_l3_cache__init()
374 	writel_relaxed(BC_IRQCTL_RESET, l3pmu->regs + L3_M_BC_IRQCTL);  in qcom_l3_cache__init()
375 	writel_relaxed(PM_CR_RESET, l3pmu->regs + L3_HML3_PM_CR);  in qcom_l3_cache__init()
378 		writel_relaxed(PMCNT_RESET, l3pmu->regs + L3_HML3_PM_CNTCTL(i));  in qcom_l3_cache__init()
379 		writel_relaxed(EVSEL(0), l3pmu->regs + L3_HML3_PM_EVTYPE(i));  in qcom_l3_cache__init()
382 	writel_relaxed(PM_FLTR_RESET, l3pmu->regs + L3_HML3_PM_FILTRA);  in qcom_l3_cache__init()
383 	writel_relaxed(PM_FLTR_RESET, l3pmu->regs + L3_HML3_PM_FILTRAM);  in qcom_l3_cache__init()
384 	writel_relaxed(PM_FLTR_RESET, l3pmu->regs + L3_HML3_PM_FILTRB);  in qcom_l3_cache__init()
385 	writel_relaxed(PM_FLTR_RESET, l3pmu->regs + L3_HML3_PM_FILTRBM);  in qcom_l3_cache__init()
386 	writel_relaxed(PM_FLTR_RESET, l3pmu->regs + L3_HML3_PM_FILTRC);  in qcom_l3_cache__init()
387 	writel_relaxed(PM_FLTR_RESET, l3pmu->regs + L3_HML3_PM_FILTRCM);  in qcom_l3_cache__init()
407 	writel_relaxed(status, l3pmu->regs + L3_M_BC_OVSR);  in qcom_l3_cache__handle_irq()
442 	writel_relaxed(BC_ENABLE, l3pmu->regs + L3_M_BC_CR);  in qcom_l3_cache__pmu_enable()
449 	writel_relaxed(0, l3pmu->regs + L3_M_BC_CR);  in qcom_l3_cache__pmu_disable()