513 	struct pci_dev *bridge = bus->self;  in pci_setup_cardbus()  local
517 	pci_info(bridge, "CardBus bridge to %pR\n",  in pci_setup_cardbus()
521 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
527 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_cardbus()
528 		pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,  in pci_setup_cardbus()
530 		pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,  in pci_setup_cardbus()
535 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
537 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_cardbus()
538 		pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,  in pci_setup_cardbus()
540 		pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,  in pci_setup_cardbus()
545 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
547 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_cardbus()
548 		pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,  in pci_setup_cardbus()
550 		pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,  in pci_setup_cardbus()
555 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_cardbus()
557 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_cardbus()
558 		pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,  in pci_setup_cardbus()
560 		pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,  in pci_setup_cardbus()
577 static void pci_setup_bridge_io(struct pci_dev *bridge)  in pci_setup_bridge_io()  argument
587 	if (bridge->io_window_1k)  in pci_setup_bridge_io()
591 	res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];  in pci_setup_bridge_io()
592 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_bridge_io()
594 		pci_read_config_word(bridge, PCI_IO_BASE, &l);  in pci_setup_bridge_io()
600 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_bridge_io()
607 	pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);  in pci_setup_bridge_io()
609 	pci_write_config_word(bridge, PCI_IO_BASE, l);  in pci_setup_bridge_io()
611 	pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);  in pci_setup_bridge_io()
614 static void pci_setup_bridge_mmio(struct pci_dev *bridge)  in pci_setup_bridge_mmio()  argument
621 	res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];  in pci_setup_bridge_mmio()
622 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_bridge_mmio()
626 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_bridge_mmio()
630 	pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);  in pci_setup_bridge_mmio()
633 static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge)  in pci_setup_bridge_mmio_pref()  argument
642 	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);  in pci_setup_bridge_mmio_pref()
646 	res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];  in pci_setup_bridge_mmio_pref()
647 	pcibios_resource_to_bus(bridge->bus, &region, res);  in pci_setup_bridge_mmio_pref()
655 		pci_info(bridge, "  bridge window %pR\n", res);  in pci_setup_bridge_mmio_pref()
659 	pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);  in pci_setup_bridge_mmio_pref()
662 	pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);  in pci_setup_bridge_mmio_pref()
663 	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);  in pci_setup_bridge_mmio_pref()
668 	struct pci_dev *bridge = bus->self;  in __pci_setup_bridge()  local
670 	pci_info(bridge, "PCI bridge to %pR\n",  in __pci_setup_bridge()
674 		pci_setup_bridge_io(bridge);  in __pci_setup_bridge()
677 		pci_setup_bridge_mmio(bridge);  in __pci_setup_bridge()
680 		pci_setup_bridge_mmio_pref(bridge);  in __pci_setup_bridge()
682 	pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);  in __pci_setup_bridge()
699 int pci_claim_bridge_resource(struct pci_dev *bridge, int i)  in pci_claim_bridge_resource()  argument
704 	if (pci_claim_resource(bridge, i) == 0)  in pci_claim_bridge_resource()
707 	if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI)  in pci_claim_bridge_resource()
710 	if (!pci_bus_clip_resource(bridge, i))  in pci_claim_bridge_resource()
715 		pci_setup_bridge_io(bridge);  in pci_claim_bridge_resource()
718 		pci_setup_bridge_mmio(bridge);  in pci_claim_bridge_resource()
721 		pci_setup_bridge_mmio_pref(bridge);  in pci_claim_bridge_resource()
727 	if (pci_claim_resource(bridge, i) == 0)  in pci_claim_bridge_resource()
740 	struct pci_dev *bridge = bus->self;  in pci_bridge_check_ranges()  local
743 	b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];  in pci_bridge_check_ranges()
746 	pci_read_config_word(bridge, PCI_IO_BASE, &io);  in pci_bridge_check_ranges()
748 		pci_write_config_word(bridge, PCI_IO_BASE, 0xe0f0);  in pci_bridge_check_ranges()
749 		pci_read_config_word(bridge, PCI_IO_BASE, &io);  in pci_bridge_check_ranges()
750 		pci_write_config_word(bridge, PCI_IO_BASE, 0x0);  in pci_bridge_check_ranges()
758 	if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001)  in pci_bridge_check_ranges()
761 	pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);  in pci_bridge_check_ranges()
763 		pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE,  in pci_bridge_check_ranges()
765 		pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);  in pci_bridge_check_ranges()
766 		pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0);  in pci_bridge_check_ranges()
780 		pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32,  in pci_bridge_check_ranges()
782 		pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,  in pci_bridge_check_ranges()
784 		pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);  in pci_bridge_check_ranges()
787 		pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,  in pci_bridge_check_ranges()
1121 	struct pci_dev *bridge = bus->self;  in pci_bus_size_cardbus()  local
1122 	struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];  in pci_bus_size_cardbus()
1137 		add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,  in pci_bus_size_cardbus()
1149 		add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size,  in pci_bus_size_cardbus()
1155 	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);  in pci_bus_size_cardbus()
1158 		pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);  in pci_bus_size_cardbus()
1159 		pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);  in pci_bus_size_cardbus()
1166 	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);  in pci_bus_size_cardbus()
1169 		pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);  in pci_bus_size_cardbus()
1170 		pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);  in pci_bus_size_cardbus()
1187 			add_to_list(realloc_head, bridge, b_res+2,  in pci_bus_size_cardbus()
1203 		add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,  in pci_bus_size_cardbus()
1486 static void __pci_bridge_assign_resources(const struct pci_dev *bridge,  in __pci_bridge_assign_resources()  argument
1492 	pdev_assign_resources_sorted((struct pci_dev *)bridge,  in __pci_bridge_assign_resources()
1495 	b = bridge->subordinate;  in __pci_bridge_assign_resources()
1501 	switch (bridge->class >> 8) {  in __pci_bridge_assign_resources()
1511 		pci_info(bridge, "not setting up bridge for bus %04x:%02x\n",  in __pci_bridge_assign_resources()
1847 		if (ACPI_HANDLE(root_bus->bridge))  in pci_assign_unassigned_resources()
1848 			acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge));  in pci_assign_unassigned_resources()
1852 static void extend_bridge_window(struct pci_dev *bridge, struct resource *res,  in extend_bridge_window()  argument
1872 	pci_dbg(bridge, "bridge window %pR extended by %pa\n", res,  in extend_bridge_window()
1883 	struct pci_dev *dev, *bridge = bus->self;  in pci_bus_distribute_available_resources()  local
1885 	io_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];  in pci_bus_distribute_available_resources()
1886 	mmio_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];  in pci_bus_distribute_available_resources()
1887 	mmio_pref_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];  in pci_bus_distribute_available_resources()
1895 	extend_bridge_window(bridge, io_res, add_list, available_io);  in pci_bus_distribute_available_resources()
1896 	extend_bridge_window(bridge, mmio_res, add_list, available_mmio);  in pci_bus_distribute_available_resources()
1897 	extend_bridge_window(bridge, mmio_pref_res, add_list,  in pci_bus_distribute_available_resources()
1979 		align = pci_resource_alignment(bridge, io_res);  in pci_bus_distribute_available_resources()
1984 		align = pci_resource_alignment(bridge, mmio_res);  in pci_bus_distribute_available_resources()
1989 		align = pci_resource_alignment(bridge, mmio_pref_res);  in pci_bus_distribute_available_resources()
2000 pci_bridge_distribute_available_resources(struct pci_dev *bridge,  in pci_bridge_distribute_available_resources()  argument
2006 	if (!bridge->is_hotplug_bridge)  in pci_bridge_distribute_available_resources()
2010 	res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];  in pci_bridge_distribute_available_resources()
2012 	res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];  in pci_bridge_distribute_available_resources()
2014 	res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];  in pci_bridge_distribute_available_resources()
2017 	pci_bus_distribute_available_resources(bridge->subordinate,  in pci_bridge_distribute_available_resources()
2021 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)  in pci_assign_unassigned_bridge_resources()  argument
2023 	struct pci_bus *parent = bridge->subordinate;  in pci_assign_unassigned_bridge_resources()
2039 	pci_bridge_distribute_available_resources(bridge, &add_list);  in pci_assign_unassigned_bridge_resources()
2041 	__pci_bridge_assign_resources(bridge, &add_list, &fail_head);  in pci_assign_unassigned_bridge_resources()
2081 	retval = pci_reenable_device(bridge);  in pci_assign_unassigned_bridge_resources()
2083 		pci_err(bridge, "Error reenabling bridge (%d)\n", retval);  in pci_assign_unassigned_bridge_resources()
2084 	pci_set_master(bridge);  in pci_assign_unassigned_bridge_resources()
2088 int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type)  in pci_reassign_bridge_resources()  argument
2099 	next = bridge;  in pci_reassign_bridge_resources()
2101 		bridge = next;  in pci_reassign_bridge_resources()
2104 			struct resource *res = &bridge->resource[i];  in pci_reassign_bridge_resources()
2113 			ret = add_to_list(&saved, bridge, res, 0, 0);  in pci_reassign_bridge_resources()
2117 			pci_info(bridge, "BAR %d: releasing %pR\n",  in pci_reassign_bridge_resources()
2129 		next = bridge->bus ? bridge->bus->self : NULL;  in pci_reassign_bridge_resources()
2135 	__pci_bus_size_bridges(bridge->subordinate, &added);  in pci_reassign_bridge_resources()
2136 	__pci_bridge_assign_resources(bridge, &added, &failed);  in pci_reassign_bridge_resources()
2146 		if (bridge == dev_res->dev)  in pci_reassign_bridge_resources()
2149 		bridge = dev_res->dev;  in pci_reassign_bridge_resources()
2150 		pci_setup_bridge(bridge->subordinate);  in pci_reassign_bridge_resources()
2171 		bridge = dev_res->dev;  in pci_reassign_bridge_resources()
2172 		i = res - bridge->resource;  in pci_reassign_bridge_resources()
2178 		pci_claim_resource(bridge, i);  in pci_reassign_bridge_resources()
2179 		pci_setup_bridge(bridge->subordinate);  in pci_reassign_bridge_resources()