816 	if (!dev->pm_cap)  in pci_raw_set_power_state()
838 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_raw_set_power_state()
864 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_raw_set_power_state()
873 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_raw_set_power_state()
918 	} else if (dev->pm_cap) {  in pci_update_current_state()
921 		pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_update_current_state()
957 	if (error && !dev->pm_cap) /* Fall back to PCI_D0 */  in pci_platform_power_transition()
1133 	if (!dev->pm_cap)  in pci_choose_state()
1594 	if (dev->pm_cap) {  in pci_enable_device_flags()
1596 		pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_enable_device_flags()
1924 	if (!dev->pm_cap)  in pci_check_pme_status()
1927 	pmcsr_pos = dev->pm_cap + PCI_PM_CTRL;  in pci_check_pme_status()
1983 	if (!dev->pm_cap)  in pci_pme_capable()
2026 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in __pci_pme_active()
2032 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in __pci_pme_active()
2046 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_pme_restore()
2054 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_pme_restore()
2259 	if (!dev->pm_cap)  in pci_target_state()
2666 	dev->pm_cap = 0;  in pci_pm_init()
2682 	dev->pm_cap = pm;  in pci_pm_init()
4461 	if (!dev->pm_cap || dev->dev_flags & PCI_DEV_FLAGS_NO_PM_RESET)  in pci_pm_reset()
4464 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr);  in pci_pm_reset()
4476 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()
4481 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()